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path: root/drivers/gpu/drm/i915/display/intel_ddi.c
AgeCommit message (Expand)AuthorFilesLines
2022-01-24drm/i915: Nuke dg2_ddi_pre_enable_dp()Ville Syrjälä1-113/+4
2022-01-13drm/i915/display/adlp: Implement new step in the TC voltage swing prog sequenceJosé Roberto de Souza1-0/+22
2022-01-11drm/i915: Move TC PHY registers to their own headerMatt Roper1-0/+1
2022-01-11drm/i915: Move combo PHY registers to their own headerMatt Roper1-0/+1
2021-12-09drm/i915: Add privacy-screen support (v3)Hans de Goede1-0/+16
2021-11-10drm/i915: Call intel_update_active_dpll() for both bigjoiner pipesVille Syrjälä1-1/+7
2021-11-03drm/i915: Use intel_de_rmw() for icl combo phy programmingVille Syrjälä1-26/+18
2021-11-03drm/i915: Use intel_de_rmw() for icl mg phy programmingVille Syrjälä1-73/+42
2021-11-03drm/i915: Use intel_de_rmw() for tgl dkl phy programmingVille Syrjälä1-21/+17
2021-11-03drm/i915: Query the vswing levels per-lane for tgl dkl phyVille Syrjälä1-14/+19
2021-11-03drm/i915: Query the vswing levels per-lane for icl mg phyVille Syrjälä1-1/+12
2021-11-03drm/i915: Query the vswing levels per-lane for icl combo phyVille Syrjälä1-1/+6
2021-11-03drm/i915: Stop using group access when progrmming icl combo phy TXVille Syrjälä1-12/+16
2021-11-01drm/i915/hdmi: Turn DP++ TMDS output buffers back on in encoder->shutdown()Ville Syrjälä1-0/+1
2021-10-27drm/i915: Reduce bigjoiner special casingVille Syrjälä1-14/+2
2021-10-27drm/i915: Split PPS write from DSC enableVille Syrjälä1-3/+11
2021-10-27drm/i915: Introduce intel_master_crtc()Ville Syrjälä1-4/+2
2021-10-27Revert "drm/i915/display: Disable audio, DRRS and PSR before planes"Ville Syrjälä1-20/+10
2021-10-19drm/i915: Move intel_ddi_fdi_post_disable() to fdi codeVille Syrjälä1-36/+1
2021-10-19drm/i915: Move iCLKIP readout to the pch codeVille Syrjälä1-3/+4
2021-10-14drm/i915: Add all per-lane register definitions for icl combo phyVille Syrjälä1-7/+7
2021-10-14drm/i915: Extract icl_combo_phy_loadgen_select()Ville Syrjälä1-9/+14
2021-10-14drm/i915: Remove dead DKL_TX_LOADGEN_SHARING_PMD_DISABLE stuffVille Syrjälä1-8/+0
2021-10-14drm/i915: Use standard form terminating condition for lane for loopsVille Syrjälä1-2/+2
2021-10-14drm/i915: Remove pointless extra namespace from dkl/snps buf trans structsVille Syrjälä1-3/+3
2021-10-12drm/i915/dg2: update link training for 128b/132bJani Nikula1-5/+13
2021-10-05drm/i915/tc: Delete bogus NULL check in intel_ddi_encoder_destroy()Dan Carpenter1-2/+1
2021-10-04drm/i915: Pass the lane to intel_ddi_level()Ville Syrjälä1-9/+10
2021-10-04drm/i915: Nuke intel_ddi_hdmi_num_entries()Ville Syrjälä1-12/+5
2021-10-04drm/i915: Hoover the level>=n_entries WARN into intel_ddi_level()Ville Syrjälä1-12/+15
2021-10-04drm/i915: De-wrapper bxt_ddi_phy_set_signal_levels()Ville Syrjälä1-23/+1
2021-10-04drm/i915: Nuke useless .set_signal_levels() wrappersVille Syrjälä1-88/+31
2021-10-04drm/i915: Generalize .set_signal_levels()Ville Syrjälä1-57/+47
2021-10-04drm/i915: Introduce has_buf_trans_select()Ville Syrjälä1-2/+9
2021-10-04drm/i915: Introduce has_iboost()Ville Syrjälä1-4/+9
2021-09-30drm/i915: s/ddi_translations/trans/Ville Syrjälä1-46/+46
2021-09-30drm/i915: Call intel_ddi_init_dp_buf_reg() earlierVille Syrjälä1-23/+21
2021-09-29drm/i915/tc: Fix TypeC PHY connect/disconnect logic on ADL-PImre Deak1-2/+5
2021-09-29drm/i915/tc: Add/use helpers to retrieve TypeC port propertiesImre Deak1-20/+11
2021-09-29drm/i915/tc: Fix TypeC port init/resume time sanitizationImre Deak1-1/+7
2021-09-23drm/i915/display: Only keep PSR enabled if there is active planesJosé Roberto de Souza1-2/+0
2021-09-20drm/i915/dg2: use 128b/132b transcoder DDI modeJani Nikula1-7/+20
2021-09-20drm/i915/dg2: configure TRANS_DP2_CTL for DP 2.0Jani Nikula1-1/+16
2021-09-20drm/i915/dg2: add DG2+ TRANS_DDI_FUNC_CTL DP 2.0 128b/132b modeJani Nikula1-3/+3
2021-09-15drm/i915: s/pipe/transcoder/ when dealing with PIPECONF/TRANSCONFVille Syrjälä1-2/+2
2021-08-30drm/i915/display: Renaming DRRS functions to intel_drrs_*()José Roberto de Souza1-3/+3
2021-08-30drm/i915/display: Move DRRS code its own fileJosé Roberto de Souza1-0/+1
2021-08-26drm/i915/backlight: mass rename functions to have intel_backlight_ prefixJani Nikula1-1/+1
2021-08-26drm/i915/backlight: extract backlight code to a separate fileJani Nikula1-1/+1
2021-08-13drm/i915/dg2: use existing mechanisms for SNPS PHY translationsJani Nikula1-3/+3
generated by cgit v1.2.3 (git 2.39.1) at 2024-06-07 16:15:33 +0000