summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/i915/display/intel_audio.c
AgeCommit message (Expand)AuthorFilesLines
2020-09-17drm/i915: Nuke force_min_cdclk_changedVille Syrjälä1-5/+0
2020-05-04drm/i915: Streamline the artihmeticVille Syrjälä1-39/+20
2020-05-04drm/i915: Rename variables to be consistent with bspecVille Syrjälä1-13/+17
2020-05-04drm/i915: Nuke mode.vrefresh usageVille Syrjälä1-7/+3
2020-04-21drm/i915/audio: fix compressed_bpp checkJani Nikula1-10/+5
2020-04-20drm/i915/audio: error log non-zero audio power refcount after unbindJani Nikula1-0/+4
2020-04-17drm/i915/display: Enable DP Display Audio WAUma Shankar1-0/+146
2020-04-14drm/i915: do AUD_FREQ_CNTRL state save on all gen9+ platformsKai Vehmanen1-2/+2
2020-04-08drm/i915/audio: use struct drm_device based loggingJani Nikula1-5/+7
2020-03-27drm/i915: use forced codec wake on all gen9+ platformsKai Vehmanen1-1/+1
2020-03-11drm/i915: Add missing HDMI audio pixel clocks for gen12Kai Vehmanen1-0/+8
2020-02-26drm/i915: Get first crtc instead of PIPE_A crtcAnshuman Gupta1-1/+1
2020-02-04drm/i915/audio: Skip the cdclk modeset if no pipes attachedChris Wilson1-4/+8
2020-02-02drm/i915/display/audio: Make WARN* drm specific where drm_priv ptr is availablePankaj Bharadiya1-8/+11
2020-01-31drm/i915: Convert cdclk to global stateVille Syrjälä1-9/+30
2020-01-31drm/i915: Introduce better global state handlingVille Syrjälä1-1/+1
2020-01-31drm/i915: Extract intel_cdclk_stateVille Syrjälä1-2/+2
2020-01-27drm/i915/audio: use intel_de_*() functions for register accessJani Nikula1-54/+58
2020-01-23drm/i915/audio: convert to struct drm_device logging macros.Wambui Karuga1-31/+42
2020-01-13drm/i915: Use the passed in encoderVille Syrjälä1-2/+2
2020-01-06drm/i915: Limit audio CDCLK>=2*BCLK constraint back to GLK onlyKai Vehmanen1-2/+2
2019-11-01drm/i915: Perform automated conversions for crtc uapi/hw split, base -> uapi.Maarten Lankhorst1-4/+4
2019-11-01drm/i915: Perform automated conversions for crtc uapi/hw split, base -> hw.Maarten Lankhorst1-2/+2
2019-10-24drm/i915: Rework global state lockingVille Syrjälä1-7/+3
2019-10-04drm/i915: extend audio CDCLK>=2*BCLK constraint to more platformsKai Vehmanen1-2/+2
2019-10-04drm/i915: Fix audio power up sequence for gen10+ displayKai Vehmanen1-0/+5
2019-09-23drm/i915: save AUD_FREQ_CNTRL state at audio domain suspendKai Vehmanen1-2/+15
2019-09-02drm/i915: Prefer encoder->name over port_name()Ville Syrjälä1-4/+6
2019-08-07drm/i915: rename intel_drv.h to display/intel_display_types.hJani Nikula1-1/+1
2019-07-03drm/i915: Add N & CTS values for 10/12 bit deep colorAditya Swarup1-11/+68
2019-07-03drm/i915: Use port clock to set correct N valueAditya Swarup1-3/+1
2019-06-17drm/i915: move modesetting core code under display/Jani Nikula1-0/+1104
generated by cgit v1.2.3 (git 2.39.1) at 2024-06-12 04:28:31 +0000