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path: root/drivers/gpu/drm/amd/display/dc/dcn302/dcn302_resource.c
AgeCommit message (Expand)AuthorFilesLines
2022-05-26drm/amd/display: Move FPU associated DCN30 code to DML folderJasdeep Dhillon1-0/+2
2022-04-05drm/amd/display: Enable 3 plane for DCN 3.0 and 3.02Krunoslav Kovac1-3/+3
2022-02-07drm/amdgpu: move dpcs_3_0_0 headers from dcn to dpcsAlex Deucher1-2/+2
2022-01-18drm/amd/display: move FPU associated DCN302 code to DML folder (#2266)Jasdeep Dhillon1-306/+10
2021-12-30drm/amd/display: Changed pipe split policy to allow for multi-display pipe splitAngus Wang1-1/+1
2021-12-01drm/amd/display: Enable P010 for DCN3x ASICsStylon Wang1-1/+1
2021-11-22drm/amd/display: Fix LTTPR not EnabledAngus Wang1-0/+18
2021-11-22drm/amd/display: Revert changes for MPO underflowAngus Wang1-1/+1
2021-11-17drm/amd/display: Fix RGB MPO underflow with multiple displaysAngus Wang1-1/+1
2021-09-14drm/amd/display: Fix multiple memory leaks reported by coverityAnson Jacob1-1/+5
2021-09-01drm/amd/display: add missing ABM register offsetsJosip Pavic1-1/+1
2021-07-21drm/amd/display: Populate dtbclk entries for dcn3.02/3.03Bindu Ramamurthy1-1/+5
2021-07-21drm/amd/display: Populate socclk entries for dcn3.02/3.03Bindu Ramamurthy1-2/+5
2021-06-21drm/amd/display: get socBB from VBIOS for dcn302 and dcn303Aurabindo Pillai1-0/+20
2021-06-18drm/amd/display: Increase stutter watermark for dcn302 and dcn303Aurabindo Pillai1-2/+2
2021-06-08drm/amd/display: Change default policy for MPO with multidisplayAric Cyr1-1/+1
2021-05-19drm/amd/display: Fix typo of format termination newlineJoe Perches1-1/+1
2021-05-19drm/amd/display: Use the correct max downscaling value for DCN3.x familyNikola Cornij1-3/+4
2021-04-09drm/amd/display: Update DCN302 SR Exit LatencyJoshua Aberback1-1/+1
2021-04-09drm/amd/display: revert max lb lines changeDmytro Laktyushkin1-1/+1
2021-03-23drm/amd/display: fix dcn3+ bw validation soc param update sequenceDmytro Laktyushkin1-0/+1
2021-03-23drm/amd/display: Separate caps for maximum RGB and YUV plane countsAtufa Khan1-0/+2
2021-03-23drm/amd/display: use max lb for latency hidingDmytro Laktyushkin1-1/+3
2021-02-02drm/amd/display: fix initial bounding box values for dcn3.02Samson Tam1-4/+164
2021-01-21drm/amd/display: Update dcn30_apply_idle_power_optimizations() codeBhawanpreet Lakha1-1/+3
2021-01-21drm/amd/display: Dynamic cursor cache size for MALL eligibility checkBhawanpreet Lakha1-0/+1
2021-01-05drm/amd/display: Create and Destroy PSR resources for DCN302Joshua Aberback1-0/+13
2021-01-05drm/amd/display: remove useless else ifTian Tao1-2/+0
2020-11-24drm/amd/display: Source minimum HBlank supportAshley Thomas1-0/+1
2020-11-24drm/amd/display: add i2c speed arbitration for dc_i2c and hdcp_i2cCharlene Liu1-0/+1
2020-11-24drm/amd/display: Add DPCS regs for dcn302 link encoderBhawanpreet Lakha1-0/+1
2020-11-10drm/amd/display: force use sRGB for video TF is sRGB or BT709Jing Zhou1-0/+1
2020-11-10drm/amdgpu: Add and use seperate reg headers for dcn302Bhawanpreet Lakha1-2/+2
2020-11-02drm/amd/display: Update panel registerChris Park1-1/+1
2020-10-26drm/amd/display: Refactor ABM_MASK_SH_LIST_DCN301 namingRoman Li1-2/+2
2020-10-16drm/amd/display: Use amdgpu_socbb.h instead of redefining structsBhawanpreet Lakha1-57/+1
2020-10-12drm/amd/display: Add support for DCN302 (v2)Bhawanpreet Lakha1-0/+1619