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path: root/drivers/gpu/drm/amd/display/dc/dcn301
AgeCommit message (Expand)AuthorFilesLines
2021-12-13drm/amd/display: fix function scopesIsabella Basso2-33/+22
2021-12-13drm/amd: append missing includesIsabella Basso1-0/+2
2021-12-01drm/amd/display: Enable P010 for DCN3x ASICsStylon Wang1-1/+1
2021-11-22drm/amd/display: enable seamless boot for DCN301Zhan Liu1-1/+1
2021-11-22drm/amd/display: Fix LTTPR not EnabledAngus Wang1-0/+17
2021-11-17drm/amd/display: remove dmcub_support cap dependencyCharlene Liu1-2/+0
2021-10-28drm/amd/display: move FPU associated DCN301 code to DML folderQingqing Zhuo3-365/+13
2021-09-23drm/amd/display: Use adjusted DCN301 watermarksNikola Cornij1-1/+95
2021-09-14drm/amd/display: Fix multiple memory leaks reported by coverityAnson Jacob1-1/+5
2021-08-18drm/amd/display: Use DCN30 watermark calc for DCN301Zhan Liu1-95/+1
2021-07-21drm/amd/display: log additional register state for debugJosip Pavic1-0/+1
2021-06-08drm/amd/display: Add interface for ADD & DROP PIXEL RegistersWesley Chalmers1-0/+2
2021-06-08drm/amd/display: Add Interface to set FIFO ERRDET SW OverrideWesley Chalmers1-0/+1
2021-06-08drm/amd/display: Refactor visual confirmWyatt Wood1-2/+1
2021-05-27Revert "drm/amd/display: Refactor and add visual confirm for HW Flip Queue"Qingqing Zhuo1-1/+0
2021-05-19drm/amd/display: Fix typo of format termination newlineJoe Perches1-1/+1
2021-05-19drm/amd/display: Refactor and add visual confirm for HW Flip QueueWyatt Wood1-0/+1
2021-05-19drm/amd/display: Use the correct max downscaling value for DCN3.x familyNikola Cornij1-3/+4
2021-04-15drm/amd/display: Connect clock optimization function to dcn301Mikita Lipski1-0/+2
2021-04-09drm/amd/display: Add function and debugfs to dump DCC_EN bitVictor Lu1-1/+2
2021-04-09drm/amd/display: Add dc_debug flag to disable min fclkHarry Wentland1-1/+1
2021-04-09drm/amd/display: revert max lb lines changeDmytro Laktyushkin1-1/+1
2021-03-26Merge tag 'amd-drm-next-5.13-2021-03-23' of https://gitlab.freedesktop.org/ag...Daniel Vetter2-2/+6
2021-03-23drm/amd/display: fix dcn3+ bw validation soc param update sequenceDmytro Laktyushkin1-0/+1
2021-03-23drm/amd/display: Separate caps for maximum RGB and YUV plane countsAtufa Khan1-0/+2
2021-03-23drm/amd/display: use max lb for latency hidingDmytro Laktyushkin1-1/+1
2021-03-23drm/amdgpu/display: drop dcn301_calculate_wm_and_dl for nowcharles sun1-95/+3
2021-03-23drm/amdgpu/display: Use wm_table.entries for dcn301 calculate_wmZhan Liu1-1/+95
2021-03-10drm/amdgpu/display: Use wm_table.entries for dcn301 calculate_wmZhan Liu1-1/+95
2021-02-18drm/amd/display: Old sequence for HUBP blankAurabindo Pillai1-1/+0
2021-02-02drm/amd/display: Drop SOC bounding box hookup in DM/DCNicholas Kazlauskas1-105/+2
2021-01-25amdgpu: fix clang build warningArnd Bergmann1-1/+2
2021-01-13drm/amd/display: Add a missing DCN3.01 API mappingNikola Cornij1-0/+1
2021-01-13drm/amd/display: New sequence for HUBP blankWesley Chalmers1-0/+1
2021-01-05drm/amdgpu/display: drop DCN support for aarch64Alex Deucher1-4/+0
2020-12-01drm/amd/display: Properly define DPCS related info for DCN301Zhan Liu1-2/+9
2020-11-24drm/amd/display: init soc bounding box for dcn3.01.Yongqiang Sun1-60/+60
2020-11-24drm/amd/display: enable pipe power gating by defaultSung Joon Kim1-4/+4
2020-11-24drm/amd/display: Enable stutter for dcn3.01.Yongqiang Sun1-1/+0
2020-11-24drm/amd/display: Update panel registerChris Park1-0/+1
2020-11-24drm/amd/display: Source minimum HBlank supportAshley Thomas1-0/+1
2020-11-24drm/amd/display: add i2c speed arbitration for dc_i2c and hdcp_i2cCharlene Liu1-0/+1
2020-11-16drm/amd/display: update vgh bounding boxYongqiang Sun1-13/+47
2020-11-10drm/amd/display: force use sRGB for video TF is sRGB or BT709Jing Zhou1-0/+1
2020-11-02drm/amd/display: fix the NULL pointer that missed set_disp_pattern_generator ...Huang Rui1-0/+1
2020-10-26drm/amd/display: Update GSL state if leaving immediate flipAlvin Lee1-1/+0
2020-10-26drm/amd/display: Refactor ABM_MASK_SH_LIST_DCN301 namingRoman Li1-2/+2
2020-10-16drm/amdgpu/display: fix the NULL pointer reference on dmucb on dcn301Huang Rui1-1/+1
2020-10-05drm/amd/display: Add dcn3.01 support to DC (v2)Roman Li15-0/+3222
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