summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c
AgeCommit message (Collapse)AuthorFilesLines
2022-11-09drm/amd/display: Waiting for 1 frame to fix the flash issue on PSR1Ryan Lin1-0/+5
[Why] Needs more frames waiting before the PSR_Exit sending for the specific TCON. [How] Add relock_delay_frame_cnt to control how many frames waiting are needed before the PSR_Exit sending. The default value is 0. The Driver side can set this variable for specific TCONs. Reviewed-by: Robin Chen <robin.chen@amd.com> Acked-by: Alan Liu <HaoPing.Liu@amd.com> Signed-off-by: Ryan Lin <tsung-hua.lin@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-11-01drm/amd/display: Modify checks to enable TPS3 pattern when requiredIswara Nagulendran1-1/+5
[HOW&WHY] Checking if both DSC and FEC supported from sink and source before going with TPS3 pattern during link training. Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Iswara Nagulendran <iswara.nagulendran@amd.com> Tested-by: Mark Broadworth <mark.broadworth@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-09-19drm/amd/display: Revise Sink device string IDRobin Chen1-3/+4
[Why] The Sink device string ID1/ID2 use 5 bytes instead of 6 bytes, so the driver should compare the first 5 bytes only. Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Robin Chen <po-tchen@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-07drm/amd/display: Add PSR-SU-RC support in DCDavid Zhang1-0/+23
[Why] PSR-SU Rate Control - or PSR-SU-RC - enables PSR-SU panels to work with variable refresh rate to allow for more power savings. Lowering the refresh rate can increase PSR residency by expanding the eDP main link shut down duration. It can also lower panel power consumption. There is a complication with PSR, since the eDP main link can be shut down. Therefore, the timing controller (TCON) on the eDP sink nees to be able to scan out its remote buffer independent of the main link. To allow the eDP source to specify the sink's refresh rate while the link is off, vendor-specific DPCD registers are used. This allows the eDP source to then "Rate Control" the panel during PSR active. [How] Add DC support to communicate with PSR-SU-RC supported eDP sinks. The sink will need to know the desired VTotal during PSR active. This change only adds support to DC, support in amdgpu_dm is still pending to enable this fully. Signed-off-by: David Zhang <dingchen.zhang@amd.com> Signed-off-by: Leo Li <sunpeng.li@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-06drm/amd/display: PSRSU+DSC WA for specific TCONDavid Zhang1-0/+14
[why] Some specific TCON chip has HW limitation to support PSRSU+DSC. [how] Force ffu mode when DSC enabled if we detect it is the specific model from sink OUI DPCD. And disable ABM update for this case. Signed-off-by: David Zhang <dingchen.zhang@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-06drm/amd/display: fix system hang when PSR exitsDavid Zhang1-0/+16
[why] When DC driver send PSR exit dmub command to DMUB FW, it might not wait until PSR exit. Then it may hit the following deadlock situation. 1. DC driver send HW LOCK command to DMUB FW due to frame update 2. DMUB FW Set the HW lock 3. DMUB execute PSR exit sequence and stuck at polling DPG Pending register due to the HW Lock is set 4. DC driver ask DMUB FW to unlock HW lock, but DMUB FW is polling DPG pending register [how] The reason why DC driver doesn't wait until PSR exit is because some of the PSR state machine state is not update the dc driver. So when DC driver read back the PSR state, it take the state for PSR inactive. Signed-off-by: David Zhang <dingchen.zhang@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-06drm/amd/display: add vline time in micro sec to PSR contextDavid Zhang1-0/+1
[why] The current PSR SU programming margin is fixed base on FHD 60HZ panel. If the resolution and refresh rate become higher, the time of current margin might not cover the programming SU time. [how] Notice that the programming SU time is the same among different panels. Instead of fixing the margin with target line number, change the margin unit to micro second which indicate the time needed for programming SU. Then FW set the margin line number base on the line time and margin time. Signed-off-by: David Zhang <dingchen.zhang@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-06drm/amd/display: Set default value of line_capture_indicationDavid Zhang1-0/+1
[Why & how] We only support line capture indication as 0 for PSRSU Signed-off-by: David Zhang <dingchen.zhang@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-06drm/amd/display: Passing Y-granularity to dmub fwDavid Zhang1-0/+6
[Why] The Y-granularity panel parameter indicate the grid pattern granularity in the Y direction for PSRSU. [How] Send the Y-granularity data by PSR_COPY_SETTINGS dmub command. Signed-off-by: David Zhang <dingchen.zhang@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-06drm/amd/display: feed PSR-SU as psr version to dmub FWDavid Zhang1-0/+3
[why & how] set psr version as PSR-SU in kernel-FW interface function to ensure the correct dmub command parameter is fed into FW. Signed-off-by: David Zhang <dingchen.zhang@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-04-26drm/amd/display: fix non-kernel-doc comment warningsRandy Dunlap1-1/+1
Fix kernel-doc warnings for a comment that should not use kernel-doc notation: dmub_psr.c:235: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst * Set PSR power optimization flags. dmub_psr.c:235: warning: missing initial short description on line: * Set PSR power optimization flags. Fixes: e5dfcd272722 ("drm/amd/display: dc_link_set_psr_allow_active refactoring") Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Reported-by: kernel test robot <lkp@intel.com> Cc: Robin Chen <po-tchen@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Anthony Koo <Anthony.Koo@amd.com> Cc: amd-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel@ffwll.ch> Cc: Harry Wentland <harry.wentland@amd.com> Cc: Leo Li <sunpeng.li@amd.com> Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-03-02drm/amd/display: Adding a dc_debug option and dmub setting to use PHY FSM ↵Shah Dharati1-0/+1
for PSR [Why] PSR Power on/off is done in PSR. Add a dc_debug option and dmub setting to use PHY implementation of this instead. [How] Add a dc_debug option and dmub setting to use PHY FSM Power up/down for PSR. Co-authored-by: Shah Dharati <dharati.shah@amd.com> Reviewed-by: Hansen Dsouza <hansen.dsouza@amd.com> Acked-by: Alan Liu <HaoPing.Liu@amd.com> Signed-off-by: Shah Dharati <dharati.shah@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-01-25drm/amd/display: Only set PSR version when validNicholas Kazlauskas1-0/+4
[Why] DMCUB will hang if we send a PSR unsupported set version command. This can occur if we fall-through into the default case in the switch statement for PSR version. [How] Add an unsupported check after the switch statement. Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-11-22drm/amd/display: Enable DSC over eDPMikita Lipski1-0/+1
[why] - Adding a DM interface to enable DSC over eDP on Linux - DSC over eDP will allow to power savings by reducing the bandwidth required to support panel's modes - Apply link optimization algorithm to reduce link bandwidth when DSC is enabled [how] - Read eDP panel's DSC capabilities - Apply DSC policy on eDP panel based on its DSC capabilities - Enable DSC encoder's on the pipe - Enable DSC on panel's side by setting DSC_ENABLE DPCD register - Adding link optimization algorithm to reduce link rate or lane count based Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Mikita Lipski <mikita.lipski@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-11-17drm/amd/display: To support sending TPS3 pattern when restoring linkRobin Chen1-0/+9
[Why] Some panels require to use TPS3 pattern to wake up link in PSR mode. [How] To add TPS3 selection information in PSR settings command and pass to DMUB FW. Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Anson Jacob <Anson.Jacob@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Robin Chen <po-tchen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-11-17drm/amd/display: Pass panel inst to a PSR commandMikita Lipski1-1/+3
[why] PSR set power command wasn't setting panel instance and command version which caused both streams to overwrite the same PSR state. [how] Pass panel instance to the set power command function and to DMUB and set command version enum Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Anson Jacob <Anson.Jacob@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Mikita Lipski <mikita.lipski@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-10-28drm/amd/display: dc_link_set_psr_allow_active refactoringRobin Chen1-0/+20
[Why] To expose new power optimization flags to PSR interface. It allows the PSR related power features can be enabled separately base on different use scenarios. Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Agustin Gutierrez <agustin.gutierrez@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Robin Chen <po-tchen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-10-19drm/amd/display: Add missing PSR stateMikita Lipski1-0/+2
[why] PSR_STATE2b was introduced on DMCUB side, but not on the driver side, which caused convert_psr_state helper function to return PSR_STATE_INVALID. That caused visual lagging during state transition. [how] Add PSR_STATE2b to dc_psr_state and convert_psr_state Reviewed-by: Wyatt Wood <Wyatt.Wood@amd.com> Acked-by: Agustin Gutierrez Sanchez <agustin.gutierrez@amd.com> Signed-off-by: Mikita Lipski <mikita.lipski@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-08-09drm/amd/display: use do-while-0 for DC_TRACE_LEVEL_MESSAGE()Randy Dunlap1-1/+1
Building with W=1 complains about an empty 'else' statement, so use the usual do-nothing-while-0 loop to quieten this warning. ../drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dmub_psr.c:113:53: warning: suggest braces around empty body in an 'else' statement [-Wempty-body] 113 | *state, retry_count); Fixes: b30eda8d416c ("drm/amd/display: Add ETW log to dmub_psr_get_state") Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Cc: Wyatt Wood <wyatt.wood@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Christian König <christian.koenig@amd.com> Cc: "Pan, Xinhui" <Xinhui.Pan@amd.com> Cc: Harry Wentland <harry.wentland@amd.com> Cc: Leo Li <sunpeng.li@amd.com> Cc: amd-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel@ffwll.ch> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-07-27drm/amd/display: Add ETW log to dmub_psr_get_stateWyatt Wood1-3/+14
[Why] GPINT commands have the lowest priority in DMCUB, so it's possible that the command isn't processed in time. [How] Add a log to help identify this case. Reviewed-by: Koo Anthony <Anthony.Koo@amd.com> Acked-by: Solomon Chiu <solomon.chiu@amd.com> Signed-off-by: Wyatt Wood <wyatt.wood@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-07-27drm/amd/display: Fix PSR command versionMikita Lipski1-2/+2
[why] For dual eDP when setting the new settings we need to set command version to DMUB_CMD_PSR_CONTROL_VERSION_1, otherwise DMUB will not read panel_inst parameter. [how] Instead of PSR_VERSION_1 pass DMUB_CMD_PSR_CONTROL_VERSION_1 Reviewed-by: Wood Wyatt <Wyatt.Wood@amd.com> Acked-by: Solomon Chiu <solomon.chiu@amd.com> Signed-off-by: Mikita Lipski <mikita.lipski@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-08drm/amd/display: Enable PSR Residency for multiple panelsMikita Lipski1-3/+4
[why] Allow specifying which panel to take PSR Residency measurements from. [how] Pass panel instance to DMUB through GPINT in the upper 8 bits of the parameter. Signed-off-by: Mikita Lipski <mikita.lipski@amd.com> Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by: Stylon Wang <stylon.wang@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-08drm/amd/display: Enabling PSR support for multiple panelsMikita Lipski1-11/+23
[why] Updating PSR interfaces to allow PSR enablement per eDP panel. [how] - Copying PSR command structures to DC - Changing function interfaces to pass panel instance - Communicating with DMUB per link instead of assuming to use a single one -Iterating through all PSR capable panels when enabling/disabling all Signed-off-by: Mikita Lipski <mikita.lipski@amd.com> Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by: Stylon Wang <stylon.wang@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-04-15drm/amd/display: Fix DSC enable sequenceMike Hsieh1-0/+2
[Why] DSC is enabled before reset link and potentially cause DSC enable fail problem. [How] Enable DSC after link is reseted Signed-off-by: Mike Hsieh <chun-wei.hsieh@amd.com> Acked-by: Bindu Ramamurthy <bindur12@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-04-09drm/amd/display: Retry getting PSR state if command times outWyatt Wood1-11/+18
[Why] GPINT command to get PSR state from FW times out. [How] Add retry to get valid PSR state. Signed-off-by: Wyatt Wood <wyatt.wood@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-03-05drm/amd/display: remove redundant initialization of variable statusColin Ian King1-1/+1
The variable status is being initialized with a value that is never read and it is being updated later with a new value. The initialization is redundant and can be removed. Addresses-Coverity: ("Unused value") Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-03-02drm/amd/display: Return invalid state if GPINT times outWyatt Wood1-5/+10
[Why] GPINT timeout is causing PSR_STATE_0 to be returned when it shouldn't. We must guarantee that PSR is fully disabled before doing hw programming on driver-side. [How] Return invalid state if GPINT command times out. Let existing retry logic send the GPINT until successful. Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Wyatt Wood <wyatt.wood@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-03-02drm/amd/display: Refactored DC interfaces to support multiple eDPJake Wang1-0/+1
[Why & How] Some existing DC interfaces are optimized to return a single eDP link/stream. Refactored those DC interfaces to support multiple eDP. Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Jake Wang <haonan.wang2@amd.com> Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-02-26drm/amd/display/dc/dce/dmub_psr: Remove unnecessary conversion to boolJiapeng Chong1-2/+1
Fix the following coccicheck warnings: ./drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c:273:16-21: WARNING: conversion to bool not needed here. Reported-by: Abaci Robot <abaci@linux.alibaba.com> Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-02-09drm/amd/display: Initialize dmub_rb_cmd unions to 0Wyatt Wood1-1/+5
[Why] Since dmub_rb_cmds are not initialized to 0, the header is filled with invalid data. This is causing issues on the fw side. [How] Initialize dmub_rb_cmd unions to 0. Signed-off-by: Wyatt Wood <wyatt.wood@amd.com> Reviewed-by: Josip Pavic <Josip.Pavic@amd.com> Acked-by: Anson Jacob <Anson.Jacob@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-11drm/amd/display/dc/dce/dmub_psr: Demote non-conformant kernel-doc headersLee Jones1-11/+11
Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dmub_psr.c:38: warning: Function parameter or member 'raw_state' not described in 'convert_psr_state' drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dmub_psr.c:81: warning: Function parameter or member 'dmub' not described in 'dmub_psr_get_state' drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dmub_psr.c:81: warning: Function parameter or member 'state' not described in 'dmub_psr_get_state' drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dmub_psr.c:97: warning: Function parameter or member 'dmub' not described in 'dmub_psr_set_version' drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dmub_psr.c:97: warning: Function parameter or member 'stream' not described in 'dmub_psr_set_version' drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dmub_psr.c:128: warning: Function parameter or member 'dmub' not described in 'dmub_psr_enable' drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dmub_psr.c:128: warning: Function parameter or member 'enable' not described in 'dmub_psr_enable' drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dmub_psr.c:128: warning: Function parameter or member 'wait' not described in 'dmub_psr_enable' drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dmub_psr.c:177: warning: Function parameter or member 'dmub' not described in 'dmub_psr_set_level' drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dmub_psr.c:177: warning: Function parameter or member 'psr_level' not described in 'dmub_psr_set_level' drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dmub_psr.c:203: warning: Function parameter or member 'dmub' not described in 'dmub_psr_copy_settings' drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dmub_psr.c:203: warning: Function parameter or member 'link' not described in 'dmub_psr_copy_settings' drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dmub_psr.c:203: warning: Function parameter or member 'psr_context' not described in 'dmub_psr_copy_settings' drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dmub_psr.c:284: warning: Function parameter or member 'dmub' not described in 'dmub_psr_force_static' drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dmub_psr.c:301: warning: Function parameter or member 'dmub' not described in 'dmub_psr_get_residency' drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dmub_psr.c:301: warning: Function parameter or member 'residency' not described in 'dmub_psr_get_residency' drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dmub_psr.c:323: warning: Function parameter or member 'psr' not described in 'dmub_psr_construct' drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dmub_psr.c:323: warning: Function parameter or member 'ctx' not described in 'dmub_psr_construct' drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dmub_psr.c:332: warning: Function parameter or member 'ctx' not described in 'dmub_psr_create' drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dmub_psr.c:349: warning: Function parameter or member 'dmub' not described in 'dmub_psr_destroy' Cc: Harry Wentland <harry.wentland@amd.com> Cc: Leo Li <sunpeng.li@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: "Christian König" <christian.koenig@amd.com> Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel@ffwll.ch> Cc: Wyatt Wood <wyatt.wood@amd.com> Cc: amd-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-16drm/amd/display: Add dual edp optimization flag.Yongqiang Sun1-0/+1
[Why & How] Add a dual edp power optimization flag, so driver will notify this flag to dmub FW to determine if apply the power optimization. Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Acked-by: Bindu Ramamurthy <bindu.r@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-16drm/amd/display: Hook up PSR residency command to DSATWyatt Wood1-0/+14
[Why] Use GPINT command to get PSR residency from FW. [How] Hook up PSR residency command to DSAT. Since PSR Count Request is deprecated, we will use this. Signed-off-by: Wyatt Wood <wyatt.wood@amd.com> Acked-by: Bindu Ramamurthy <bindu.r@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-10drm/amd/display: Engage PSR synchronouslyKrunoslav Kovac1-43/+68
[Why & How] The intended use is to force PSR into active state and ignore all events until explicit EXIT. A new event force_static is added to power module. It is then sent to FW. Signed-off-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com> Acked-by: Bindu Ramamurthy <bindu.r@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-09-29drm/amd/display: Ensure all debug bits are passed to fwWyatt Wood1-2/+3
[Why] Some debug bits are not being copied from driver to fw. [How] Copy debug bits properly. Signed-off-by: Wyatt Wood <wyatt.wood@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-09-22drm/amd/display: Implement PSR wait for enable/disableWyatt Wood1-1/+26
[Why] For DMUB implementation of PSR, the 'wait' parameter, used to determine if driver should wait for PSR enable/disable, is not implemented correctly. [How] Implement wait for PSR enable/disable. Signed-off-by: Wyatt Wood <wyatt.wood@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-08-06drm/amd/display: Use hw lock mgrWyatt Wood1-1/+1
[Why] Feature requires synchronization of dig, pipe, and cursor locking between driver and fw. [How] Set flag to force psr to use hw lock mgr. Signed-off-by: Wyatt Wood <wyatt.wood@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Eryk Brol <eryk.brol@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-02drm/amd/display: Initialize psr debug flags to 0Wyatt Wood1-0/+1
[Why] Debug flags are not set by default. [How] Set debug flags to 0 Signed-off-by: Wyatt Wood <wyatt.wood@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Eryk Brol <eryk.brol@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01drm/amd/display: Passing initial SDP deadline to dmubpo-tchen1-0/+1
[Why] The SDP deadline indicate the vertical time to send CRC infopacket in PSR. Signed-off-by: po-tchen <po-ting.chen@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-28drm/amd/display: FW release 1.0.10Anthony Koo1-1/+1
Signed-off-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-05drm/amd/display: move location of dmub_srv.h fileAnthony Koo1-2/+1
[Why] Make a separation of what belongs in the differen dmub headers dmub_srv.h is for exposing dmub srv interface to rest of driver. other headers inside dmub/inc exposes cmds and definitions that are owned by the firmware [How] keep firmware owned definitions in dmub/inc move stuff that is purely driver interface headers to dmub/ since those are interface calls that are defined for rest of driver to use Signed-off-by: Anthony Koo <Anthony.Koo@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-05drm/amd/display: add addition dc type to translate to dmub fw typeAnthony Koo1-2/+10
[Why] For a type like PSR version, it makes sense for most of the code to include a dc type, instead of having this a fw type define since this is a capability and type exposed by dc. Especially if it doesn't even need to communicate with the fw. The code that is packing the firmware command message should be the one who needs to translate the psr version into a command that the firmware understands. [How] Add a dc_psr_version enum. Signed-off-by: Anthony Koo <Anthony.Koo@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-04-28drm/amd/display: Pass command instead of header into DMUB serviceNicholas Kazlauskas1-4/+4
[Why] We read memory that we shouldn't be touching if the struct isn't a full union dmub_rb_cmd. [How] Fix up all the callers and functions that take in the dmub_cmd_header to use the dmub_rb_cmd instead. Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-04-28drm/amd/display: clean up some header pathsAnthony Koo1-2/+2
[Why] Some include paths don't need to have relative paths And some types missing [How] make some changes to headers and modify include path Signed-off-by: Anthony Koo <Anthony.Koo@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-04-22drm/amd/display: Various fixes for PSR on DMCUBWyatt Wood1-1/+44
[Why] - Driver does not recognize new definitions of psr states. - Internal tool is required for checking if psr is active. [How] - Parse psr state correctly so that driver will recognize psr state. - Add visual confirmation that psr is active using existing mechanisms. Signed-off-by: Wyatt Wood <wyatt.wood@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-04-22drm/amd/display: Unify psr feature flagsWyatt Wood1-7/+6
[Why] As it stands, psr has feature flags in dm, stream, and link. Most are not defined well enough, and different dm layers have different uses for these same flags. [How] We define a new structure called psr_settings in dc_link that will hold the following psr feature flags: psr_feature_enable - psr is supported psr_allow_active - psr is currently active psr_version - internal psr version supported psr_frame_capture_indication_req psr_sdp_transmit_line_num_deadline The last two flags were moved out of the power module for the purposes of consolidating psr flags. Their use is already well-defined. Psr caps reported by sink will also be stored in dc_link, in dpcd_caps.psr_caps. Signed-off-by: Wyatt Wood <wyatt.wood@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-04-09drm/amd/display: Remove unused definesWyatt Wood1-3/+0
[Why] Defines aren't used. Remove them. Signed-off-by: Wyatt Wood <wyatt.wood@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-03-13drm/amd/display: clean up a condition in dmub_psr_copy_settings()Dan Carpenter1-5/+3
We can remove the NULL check for "res_ctx" and "res_ctx->pipe_ctx[i].stream->link". Also it's nicer to align the conditions using spaces so I re-indented a bit. Longer explanation: The "res_ctx" pointer points to an address in the middle of a struct so it can't be NULL. For "res_ctx->pipe_ctx[i].stream->link" we know that it is equal to "link" and "link" is non-NULL. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-03-05drm/amd/display: Remove pointless NULL checks in dmub_psr_copy_settingsNathan Chancellor1-1/+1
Clang warns: drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dmub_psr.c:147:31: warning: address of 'pipe_ctx->plane_res' will always evaluate to 'true' [-Wpointer-bool-conversion] if (!pipe_ctx || !&pipe_ctx->plane_res || !&pipe_ctx->stream_res) ~ ~~~~~~~~~~^~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dmub_psr.c:147:56: warning: address of 'pipe_ctx->stream_res' will always evaluate to 'true' [-Wpointer-bool-conversion] if (!pipe_ctx || !&pipe_ctx->plane_res || !&pipe_ctx->stream_res) ~ ~~~~~~~~~~^~~~~~~~~~ 2 warnings generated. As long as pipe_ctx is not NULL, the address of members in this struct cannot be NULL, which means these checks will always evaluate to false. Fixes: 4c1a1335dfe0 ("drm/amd/display: Driverside changes to support PSR in DMCUB") Link: https://github.com/ClangBuiltLinux/linux/issues/915 Reviewed-by: Nick Desaulniers <ndesaulniers@google.com> Signed-off-by: Nathan Chancellor <natechancellor@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-03-05drm/amd/display: Fix dmub_psr_destroy()Dan Carpenter1-1/+1
This is freeing the wrong variable so it will crash. It should be freeing "*dmub" instead of "dmub". Fixes: 4c1a1335dfe0 ("drm/amd/display: Driverside changes to support PSR in DMCUB") Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>