summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
AgeCommit message (Expand)AuthorFilesLines
2018-02-19drm/amdgpu: implement gmc_v9_0_emit_flush_gpu_tlbChristian König1-54/+7
2018-02-19drm/amdgpu: wire up emit_wreg for VCN v1Christian König1-0/+9
2018-02-19drm/amdgpu: forward pasid to backend flush implementationsChristian König1-2/+4
2018-02-19drm/amdgpu: move struct gart_funcs into amdgpu_gmc.hChristian König1-4/+4
2017-12-27drm/amdgpu: rename vm_id to vmidChristian König1-18/+18
2017-12-12drm/amdgpu: allow get_vm_pde to change flags as wellChristian König1-5/+7
2017-12-08drm/admgpu: Reduce the usage of soc15ip.hShaoyun Liu1-1/+0
2017-12-08drm/amdgpu: Change SOC15_REG_OFFSET to use dynamic register offsetShaoyun Liu1-0/+14
2017-12-08drm/amdgpu: Avoid use SOC15_REG_OFFSET in static const arrayShaoyun Liu1-2/+13
2017-12-06drm/amd/include:cleanup raven1 vcn header files.Feifei Xu1-2/+2
2017-12-06drm/amd/include:cleanup raven1 mmhub header files.Feifei Xu1-2/+2
2017-12-06drm/amd/include:cleanup vega10 header files.Feifei Xu1-1/+1
2017-12-06drm/amd/include:cleanup vega10 hdp header files.Feifei Xu1-1/+1
2017-11-28drm/amdgpu: Set adev->vcn.irq.num_types for VCNMichel Dänzer1-1/+1
2017-09-26drm/amdgpu:use formal register to trigger hdp invalidateMonk Liu1-1/+1
2017-06-15drm/amd/amdgpu: Port VCN over to new SOC15 macrosTom St Denis1-82/+82
2017-05-31drm/amdgpu: cleanup adjust_mc_addr handling v4Christian König1-8/+4
2017-05-24drm/amdgpu: fix merge of vcn_v1_0.c v2Christian König1-0/+2
2017-05-24drm/amdgpu: correct emit frame size for vcn dec/enc ringHawking Zhang1-2/+2
2017-05-24drm/amdgpu: correct vmhub for vcn dec/enc ringHawking Zhang1-0/+2
2017-05-24drm/amdgpu/vcn: remove duplicate maskAlex Deucher1-1/+0
2017-05-24drm/amdgpu: enable sw clock gating for vcnHuang Rui1-2/+2
2017-05-24drm/amdgpu/vcn: add sw clock gatingHuang Rui1-2/+205
2017-05-24drm/amdgpu: add vcn firmware header offsetLeo Liu1-1/+2
2017-05-24drm/amdgpu: add vcn enc ib testLeo Liu1-0/+1
2017-05-24drm/amdgpu: enable vcn encode ring testsLeo Liu1-2/+13
2017-05-24drm/amdgpu: add vcn enc irq supportLeo Liu1-3/+25
2017-05-24drm/amdgpu: add vcn enc ring type and functionsLeo Liu1-0/+170
2017-05-24drm/amdgpu: add vcn enc ringsLeo Liu1-1/+27
2017-05-24drm/amdgpu: change vcn dec rb command specific for decodeLeo Liu1-6/+6
2017-05-24drm/amdgpu: implement new vcn cache window programmingLeo Liu1-18/+16
2017-05-24drm/amdgpu: implement insert end ring function for vcn decodeLeo Liu1-1/+16
2017-05-24drm/amdgpu: implement vcn start RB commandLeo Liu1-1/+20
2017-05-24drm/amdgpu: expose vcn RB commandLeo Liu1-4/+4
2017-05-24drm/amdgpu: move vcn ring test to amdgpu_vcn.cLeo Liu1-44/+1
2017-05-24drm/amdgpu: add vcn ip block and typeLeo Liu1-0/+9
2017-05-24drm/amdgpu: add vcn irq functionsLeo Liu1-0/+32
2017-05-24drm/amdgpu: add vcn decode ring type and functionsLeo Liu1-0/+266
2017-05-24drm/amdgpu: add vcn decode ring supportLeo Liu1-0/+43
2017-05-24drm/amdgpu: add vcn ip block functions (v2)Leo Liu1-0/+417
generated by cgit v1.2.3 (git 2.39.1) at 2025-03-27 09:53:20 +0000