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path: root/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
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2018-10-09drm/amdgpu: Refine uvd_v6/7_0_enc_get_destroy_msgRex Zhu1-8/+4
2018-08-27drm/amdgpu:change VEGA booting with firmware loaded by PSPFeifei Xu1-4/+9
2018-08-27drm/amdgpu: added support 2nd UVD instanceEvan Quan1-0/+7
2018-08-27drm/amdgpu: use entity instead of ring for CSChristian König1-1/+2
2018-08-13drm/amdgpu/uvd: UVD entity initialization relys on ring initializationEmily Deng1-0/+5
2018-07-27drm/amdgpu: implement harvesting support for UVD 7.2 (v3)Alex Deucher1-3/+53
2018-07-27drm/amdgpu: patch the IBs for the second UVD instance v2Christian König1-0/+29
2018-07-19drm/amdgpu: remove superflous UVD encode entityChristian König1-14/+0
2018-07-16drm/amdgpu: add amdgpu_job_submit_direct helperChristian König1-14/+6
2018-07-16drm/amdgpu: remove ring parameter from amdgpu_job_submitChristian König1-1/+1
2018-07-13drm/scheduler: modify args of drm_sched_entity_initNayan Deshmukh1-2/+2
2018-07-13drm/amd: Use newly added interrupt source defs for SOC15.Andrey Grodzovsky1-2/+3
2018-07-05drm/scheduler: Rename cleanup functions v2.Andrey Grodzovsky1-1/+1
2018-05-18drm/amdgpu: fix insert nop for UVD7 ringLeo Liu1-4/+6
2018-05-18drm/amdgpu/vg20:Enable the 2nd instance IRQ for uvd 7.2James Zhu1-2/+10
2018-05-18drm/amdgpu/vg20:Enable the 2nd instance for uvdJames Zhu1-1/+6
2018-05-18drm/amdgpu/vg20:Restruct uvd.inst to support multiple instancesJames Zhu1-475/+527
2018-05-18drm/amdgpu/vg20:Restruct uvd to support multiple uvdsJames Zhu1-67/+68
2018-05-15drm/scheduler: remove unused parameterNayan Deshmukh1-1/+1
2018-05-15drm/amdgpu: add HDP flush dummy for UVD 6/7Christian König1-1/+12
2018-05-15drm/amdgpu/uvd7: add emit_reg_write_reg_wait ring callbackXiaojie Yuan1-0/+1
2018-05-15drm/amdgpu/uvd7: add emit_reg_write_reg_wait ring callbackAlex Deucher1-0/+1
2018-03-14drm/amdgpu: Move IH clientid defs to separate fileOak Zeng1-2/+2
2018-02-19drm/amdgpu: separate PASID mapping from VM flush v2Christian König1-6/+4
2018-02-19drm/amdgpu: move waiting for VM flush into gmc_v9_0_emit_flush_gpu_tlbChristian König1-14/+6
2018-02-19drm/amdgpu: implement uvd_v7_0_(enc_|)ring_emit_reg_wait v2Christian König1-16/+24
2018-02-19drm/amdgpu: remove now superflous *_hdp operationChristian König1-35/+2
2018-02-19drm/amdgpu: implement gmc_v9_0_emit_flush_gpu_tlbChristian König1-36/+7
2018-02-19drm/amdgpu: wire up emit_wreg for UVD v7Christian König1-7/+17
2018-02-19drm/amdgpu: forward pasid to backend flush implementationsChristian König1-2/+4
2018-02-19drm/amdgpu: move struct gart_funcs into amdgpu_gmc.hChristian König1-4/+4
2017-12-27drm/amdgpu: rename vm_id to vmidChristian König1-18/+18
2017-12-12drm/amdgpu: allow get_vm_pde to change flags as wellChristian König1-5/+7
2017-12-08drm/admgpu: Reduce the usage of soc15ip.hShaoyun Liu1-1/+0
2017-12-08drm/amdgpu: Change SOC15_REG_OFFSET to use dynamic register offsetShaoyun Liu1-0/+13
2017-12-08drm/amdgpu: Avoid use SOC15_REG_OFFSET in static const arrayShaoyun Liu1-2/+12
2017-12-07drm: move amd_gpu_scheduler into common locationLucas Stach1-4/+4
2017-12-06drm/amd/include:cleanup vega10 header files.Feifei Xu1-1/+1
2017-12-06drm/amd/include:cleanup vega10 nbif header files.Feifei Xu1-1/+1
2017-12-06drm/amd/include:cleanup vega10 mmhub header files.Feifei Xu1-2/+2
2017-12-06drm/amd/include:cleanup vega10 vce header files.Feifei Xu1-3/+3
2017-12-06drm/amd/include:cleanup vega10 uvd header files.Feifei Xu1-2/+2
2017-12-06drm/amd/include:cleanup vega10 hdp header files.Feifei Xu1-1/+1
2017-12-06drm/amd/amdgpu: fix UVD mc offsetsPiotr Redlewski1-1/+1
2017-12-04drm/amdgpu: change redundant init logs to debug levelpding1-3/+3
2017-12-04drm/amd/scheduler:introduce guilty pointer memberMonk Liu1-1/+1
2017-10-25drm/amd/amdgpu: Remove workaround for suspend/resume in uvd7Tom St Denis1-11/+5
2017-09-26drm/amdgpu:use formal register to trigger hdp invalidateMonk Liu1-1/+1
2017-08-15drm/amdgpu/uvd7: optimize uvd initialization sequence for SRIOVFrank Min1-47/+11
2017-08-15drm/amdgpu: According hardware design revert vce and uvd doorbell assignmentFrank Min1-2/+8