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path:
root
/
drivers
/
gpu
/
drm
/
amd
/
amdgpu
/
nv.c
Age
Commit message (
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)
Author
Files
Lines
2020-11-16
drm/amdgpu/sriov: reopen sienna_child smu ip block under sriov
Jane Jian
1
-1
/
+1
2020-11-10
drm/amdgpu: enable DCN for navi10 headless SKU
Tianci.Yin
1
-2
/
+1
2020-11-04
drm/amdgpu: Enable FGCG for Vangogh
Jinzhou.Su
1
-0
/
+1
2020-11-02
amdgpu: Add mmhub MGCG and MGLS for vangogh
Jinzhou.Su
1
-0
/
+2
2020-10-30
amdgpu: Add GFX MGCG and MGLS for vangogh
Jinzhou.Su
1
-1
/
+5
2020-10-30
drm/amdgpu: rename nv_is_headless_sku()
Flora Cui
1
-3
/
+3
2020-10-30
drm/amdgpu: disable DCN and VCN for Navi14 0x7340/C9 SKU
Flora Cui
1
-2
/
+3
2020-10-27
drm/amdgpu: add vangogh apu flag
Huang Rui
1
-1
/
+3
2020-10-26
drm/amdgpu: enable IP discovery for vangogh
Xiaomeng Hou
1
-4
/
+0
2020-10-23
drm/amdgpu: disable DCN and VCN for navi10 blockchain SKU(v3)
Tianci.Yin
1
-2
/
+12
2020-10-21
drm/amdgpu: enable VCN PG and CG for vangogh
Boyuan Zhang
1
-2
/
+7
2020-10-16
drm/amdgpu/display: enable display ip block for vangogh
Huang Rui
1
-0
/
+4
2020-10-15
drm/amdgpu: fulfill Navi gfx and pcie settings on umd pstate switching(V2)
Evan Quan
1
-0
/
+24
2020-10-12
drm/amdgpu: add DM block for dimgrey_cavefish
Tao Zhou
1
-0
/
+4
2020-10-12
drm/amdgpu: enable ih CG for dimgrey_cavefish
Tao Zhou
1
-1
/
+2
2020-10-12
drm/amdgpu: enable hdp CG and LS for dimgrey_cavefish
Tao Zhou
1
-1
/
+3
2020-10-12
drm/amdgpu: add psp and smu block for dimgrey_cavefish
Tao Zhou
1
-0
/
+5
2020-10-12
drm/amdgpu: enable jpeg3.0 for dimgrey_cavefish
James Zhu
1
-0
/
+1
2020-10-12
drm/amdgpu: enable vcn3.0 for dimgrey_cavefish
James Zhu
1
-0
/
+1
2020-10-12
drm/amdgpu: enable athub/mmhub PG for dimgrey_cavefish
Tao Zhou
1
-1
/
+3
2020-10-12
drm/amdgpu: enable mc CG and LS for dimgrey_cavefish
Tao Zhou
1
-1
/
+3
2020-10-12
drm/amdgpu: enable GFX clock gating for dimgrey_cavefish
Tao Zhou
1
-1
/
+4
2020-10-12
drm/amdgpu: enable jpeg3.0 PG and CG for dimgrey_cavefish
James Zhu
1
-2
/
+4
2020-10-12
drm/amdgpu: enable VCN3.0 PG and CG for dimgrey_cavefish
James Zhu
1
-2
/
+3
2020-10-12
drm/amdgpu/vcn: enable VCN DPG mode for dimgrey_cavefish
James Zhu
1
-1
/
+1
2020-10-12
drm/amdgpu: add virtual display support for dimgrey_cavefish
Tao Zhou
1
-0
/
+2
2020-10-12
drm/amdgpu: add sdma ip block for dimgrey_cavefish
Tao Zhou
1
-0
/
+1
2020-10-12
drm/amdgpu: add gfx ip block for dimgrey_cavefish
Tao Zhou
1
-0
/
+1
2020-10-12
drm/amdgpu: add ih ip block for dimgrey_cavefish
Tao Zhou
1
-0
/
+1
2020-10-12
drm/amdgpu: add gmc ip block for dimgrey_cavefish
Tao Zhou
1
-0
/
+1
2020-10-12
drm/amdgpu: add common ip block for dimgrey_cavefish
Tao Zhou
1
-0
/
+3
2020-10-12
drm/amdgpu: initialize IP offset for dimgrey_cavefish
Tao Zhou
1
-0
/
+3
2020-10-12
drm/amdgpu: add common support for dimgrey_cavefish
Tao Zhou
1
-0
/
+6
2020-10-05
drm/amdgpu: enable gfx clock gating and power gating for vangogh
Huang Rui
1
-2
/
+5
2020-10-05
drm/amdgpu: IP discovery table is not ready yet for VG
Alex Deucher
1
-0
/
+4
2020-10-05
drm/amdgpu: enable psp support for vangogh
Huang Rui
1
-0
/
+2
2020-10-05
drm/amdgpu: add smu ip block for vangogh
Huang Rui
1
-0
/
+1
2020-10-05
drm/amdgpu: add nbio v7.2 for vangogh (v2)
Huang Rui
1
-2
/
+8
2020-10-05
drm/amdgpu: add pcie port indirect read and write on nv
Huang Rui
1
-0
/
+32
2020-10-05
drm/amdgpu: enable vcn3.0 for van gogh
Thong Thai
1
-0
/
+2
2020-10-05
drm/amdgpu: set ip blocks for van gogh
Huang Rui
1
-0
/
+9
2020-10-05
drm/amdgpu: skip sdma1 in nv_allowed_read_registers list for van gogh (v2)
Huang Rui
1
-1
/
+2
2020-10-05
drm/amdgpu: add nv common ip block support for van gogh
Huang Rui
1
-0
/
+8
2020-10-01
drm/amdgpu: switch to indirect reg access helper
Hawking Zhang
1
-43
/
+8
2020-09-22
drm/amdgpu: fix hdp register access error
Stanley.Yang
1
-1
/
+1
2020-09-15
drm/amdgpu: Fix consecutive DPC recovery failures.
Andrey Grodzovsky
1
-2
/
+2
2020-08-26
drm/amdgpu: use MODE1 reset for navy_flounder by default
Jiansong Chen
1
-0
/
+1
2020-08-26
drm/amdgpu: add pre_asic_init callback for navi
Alex Deucher
1
-0
/
+5
2020-08-14
drm/amdgpu: note what type of reset we are using
Alex Deucher
1
-2
/
+4
2020-08-07
drm/amdgpu: use mode1 reset by default for sienna_cichlid
Likun Gao
1
-3
/
+8
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