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path: root/drivers/cxl
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2021-11-08Merge tag 'cxl-for-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/cxl...Linus Torvalds12-1311/+1580
2021-10-29cxl/pci: Use pci core's DVSEC functionalityBen Widawsky1-24/+2
2021-10-29cxl/pci: Split cxl_pci_setup_regs()Ben Widawsky1-36/+37
2021-10-29cxl/pci: Add @base to cxl_register_mapDan Williams2-15/+26
2021-10-29cxl/pci: Make more use of cxl_register_mapBen Widawsky1-34/+25
2021-10-29cxl/pci: Remove pci request/release regionsBen Widawsky1-5/+0
2021-10-29cxl/pci: Fix NULL vs ERR_PTR confusionDan Williams1-1/+1
2021-10-29cxl/pci: Remove dev_dbg for unknown register blocksBen Widawsky1-3/+0
2021-10-29cxl/pci: Convert register block identifiers to an enumBen Widawsky1-6/+8
2021-10-08cxl/acpi: Do not fail cxl_acpi_probe() based on a missing CHBSAlison Schofield1-4/+6
2021-09-25cxl/core: Replace unions with struct_group()Kees Cook1-43/+18
2021-09-21cxl/pci: Disambiguate cxl_pci further from cxl_memBen Widawsky1-33/+35
2021-09-21cxl/core: Split decoder setup into alloc + addDan Williams5-126/+114
2021-09-21tools/testing/cxl: Introduce a mock memory device + driverDan Williams3-5/+5
2021-09-21cxl/mbox: Move command definitions to common locationDan Williams3-48/+65
2021-09-21cxl/bus: Populate the target list at decoder createDan Williams3-27/+91
2021-09-21tools/testing/cxl: Introduce a mocked-up CXL port hierarchyDan Williams2-15/+37
2021-09-21cxl/pmem: Add support for multiple nvdimm-bridge objectsDan Williams3-16/+33
2021-09-21cxl/pmem: Translate NVDIMM label commands to CXL label commandsDan Williams1-4/+124
2021-09-21cxl/mbox: Add exclusive kernel command supportDan Williams4-3/+67
2021-09-21cxl/mbox: Convert 'enabled_cmds' to DECLARE_BITMAPDan Williams2-12/+2
2021-09-21cxl/pci: Use module_pci_driverDan Williams1-22/+8
2021-09-21cxl/mbox: Move mailbox and other non-PCI specific infrastructure to the coreDan Williams7-949/+972
2021-09-21cxl/pci: Drop idr.hDan Williams1-1/+0
2021-09-21cxl/mbox: Introduce the mbox_send operationDan Williams2-55/+63
2021-09-21cxl/pci: Clean up cxl_mem_get_partition_info()Dan Williams2-26/+24
2021-09-21cxl/pci: Make 'struct cxl_mem' device type genericDan Williams3-47/+41
2021-09-09Merge tag 'cxl-for-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/cxl...Linus Torvalds13-723/+988
2021-09-07cxl/registers: Fix Documentation warningDan Williams1-1/+14
2021-09-07cxl/pmem: Fix Documentation warningDan Williams1-2/+28
2021-09-07cxl/pci: Fix debug message in cxl_probe_regs()Li Qiang (Johnny Li)1-2/+2
2021-09-07cxl/pci: Fix lockdown levelDan Williams1-1/+1
2021-09-07cxl/acpi: Do not add DSDT disabled ACPI0016 host bridge portsAlison Schofield1-4/+8
2021-08-10cxl/mem: Adjust ram/pmem range to represent DPA rangesIra Weiny1-8/+6
2021-08-10cxl/mem: Account for partitionable space in ram/pmem rangesIra Weiny2-5/+96
2021-08-07cxl/pci: Store memory capacity valuesIra Weiny2-3/+37
2021-08-06cxl/pci: Simplify register setupBen Widawsky3-27/+13
2021-08-06cxl/pci: Ignore unknown register block typesBen Widawsky1-8/+12
2021-08-06cxl/core: Move memdev management to coreBen Widawsky6-234/+275
2021-08-06cxl/pci: Introduce cdevm_file_operationsDan Williams2-27/+53
2021-08-06cxl/core: Move register mapping infrastructureDan Williams3-228/+237
2021-08-06cxl/core: Move pmem functionalityDan Williams4-202/+225
2021-08-06cxl/core: Improve CXL core kernel docsBen Widawsky1-2/+9
2021-08-06cxl: Move cxl_core to new directoryBen Widawsky6-7/+10
2021-07-21bus: Make remove callback return voidUwe Kleine-König1-2/+1
2021-06-17cxl/pci: Rename CXL REGLOC IDBen Widawsky2-2/+2
2021-06-17cxl/acpi: Use the ACPI CFMWS to create static decoder objectsAlison Schofield1-0/+122
2021-06-17cxl/acpi: Add the Host Bridge base address to CXL port objectsAlison Schofield1-5/+95
2021-06-15cxl/pmem: Register 'pmem' / cxl_nvdimm devicesDan Williams5-16/+215
2021-06-15cxl/pmem: Add initial infrastructure for pmem supportDan Williams6-2/+335
generated by cgit v1.2.3 (git 2.39.1) at 2024-11-01 15:37:55 +0000