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path: root/drivers/cxl/acpi.c
AgeCommit message (Expand)AuthorFilesLines
2022-04-28cxl/acpi: Add root device lockdep validationDan Williams1-0/+13
2022-02-08cxl/core/port: Fix / relax decoder target enumerationDan Williams1-1/+1
2022-02-08cxl/mem: Add the cxl_mem driverBen Widawsky1-1/+2
2022-02-08cxl/core/port: Add switch port enumerationDan Williams1-16/+1
2022-02-08cxl/core/port: Remove @host argument for dport + decoder enumerationDan Williams1-1/+1
2022-02-08cxl/port: Add a driver for 'struct cxl_port' objectsBen Widawsky1-25/+1
2022-02-08cxl/core/hdm: Add CXL standard decoder enumeration to the coreDan Williams1-28/+15
2022-02-08cxl/core: Generalize dport enumeration in the coreDan Williams1-59/+8
2022-02-08cxl/pci: Rename pci.h to cxlpci.hDan Williams1-1/+1
2022-02-08cxl/port: Up-level cxl_add_dport() locking requirements to the callerDan Williams1-0/+2
2022-02-08cxl/port: Introduce cxl_port_to_pci_bus()Dan Williams1-5/+9
2022-02-08cxl: Prove CXL lockingDan Williams1-5/+5
2022-02-08cxl/core/port: Make passthrough decoder init implicitBen Widawsky1-5/+0
2022-02-08cxl/core/port: Clarify decoder creationBen Widawsky1-2/+2
2022-02-08cxl/core: Convert decoder range to resourceBen Widawsky1-14/+8
2022-02-08cxl/acpi: Map component registers for Root PortsBen Widawsky1-2/+11
2021-11-15ACPI: NUMA: Add a node and memblk for each CFMWS not in SRATAlison Schofield1-1/+2
2021-11-15cxl/test: Mock acpi_table_parse_cedt()Dan Williams1-0/+2
2021-11-15cxl/acpi: Convert CFMWS parsing to ACPI sub-table helpersDan Williams1-147/+87
2021-10-08cxl/acpi: Do not fail cxl_acpi_probe() based on a missing CHBSAlison Schofield1-4/+6
2021-09-21cxl/core: Split decoder setup into alloc + addDan Williams1-24/+60
2021-09-21cxl/bus: Populate the target list at decoder createDan Williams1-1/+12
2021-09-21tools/testing/cxl: Introduce a mocked-up CXL port hierarchyDan Williams1-15/+21
2021-09-07cxl/acpi: Do not add DSDT disabled ACPI0016 host bridge portsAlison Schofield1-4/+8
2021-06-17cxl/acpi: Use the ACPI CFMWS to create static decoder objectsAlison Schofield1-0/+122
2021-06-17cxl/acpi: Add the Host Bridge base address to CXL port objectsAlison Schofield1-5/+95
2021-06-15cxl/pmem: Add initial infrastructure for pmem supportDan Williams1-2/+35
2021-06-09cxl/acpi: Introduce cxl_decoder objectsDan Williams1-1/+19
2021-06-09cxl/acpi: Enumerate host bridge root portsDan Williams1-1/+92
2021-06-09cxl/acpi: Add downstream port data to cxl_port instancesDan Williams1-1/+42
2021-06-09cxl/acpi: Introduce the root of a cxl_port topologyDan Williams1-0/+39