index
:
linux
WIP-syscall
master
mmu_gather-race-fix
n900-dt
n900-dt-with-ssi
n900-dts-twl5030
n900-modem-rework
n900-omapdrm
next
proc-cmdline
sc18is600
ssi
ssi-cleaned
ssi-cleaned-dt
ssi-cleaned-dt2
ssi-cleaned-dt3
tty-splice
twl4030-madc-cleanup
Linux Kernel (branches are rebased on master from time to time)
Linus Torvalds
summary
refs
log
tree
commit
diff
stats
log msg
author
committer
range
path:
root
/
drivers
/
clocksource
/
timer-riscv.c
Age
Commit message (
Expand
)
Author
Files
Lines
2022-08-11
RISC-V: Add Sstc extension support
Palmer Dabbelt
1
-1
/
+24
2022-08-11
RISC-V: Prefer sstc extension if available
Atish Patra
1
-1
/
+24
2022-07-19
riscv: cpu: Add 64bit hartid support on RV64
Sunil V L
1
-7
/
+8
2022-05-18
clocksource/drivers/riscv: Events are stopped during CPU suspend
Samuel Holland
1
-1
/
+1
2021-10-04
RISC-V: KVM: Add timer functionality
Atish Patra
1
-0
/
+9
2020-08-20
RISC-V: Remove CLINT related code from timer and arch
Anup Patel
1
-15
/
+2
2020-06-09
clocksource/drivers/timer-riscv: Use per-CPU timer interrupt
Anup Patel
1
-3
/
+40
2020-01-04
clocksource: riscv: add notrace to riscv_sched_clock
Zong Li
1
-1
/
+1
2019-11-13
riscv: add support for MMIO access to the timer registers
Christoph Hellwig
1
-4
/
+19
2019-11-05
riscv: abstract out CSR names for supervisor vs machine mode
Christoph Hellwig
1
-4
/
+4
2019-09-05
riscv: don't use the rdtime(h) pseudo-instructions
Christoph Hellwig
1
-13
/
+4
2019-08-06
RISC-V: Remove per cpu clocksource
Atish Patra
1
-4
/
+2
2019-03-23
clocksource/drivers/riscv: Fix clocksource mask
Atish Patra
1
-3
/
+2
2019-02-23
clocksource/drivers/riscv: Add required checks during clock source init
Atish Patra
1
-3
/
+20
2018-12-18
clocksource/drivers/riscv: Change name riscv_timer to timer-riscv
Daniel Lezcano
1
-0
/
+118