| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2020-06-01 | Merge branches 'clk-unisoc', 'clk-trivial', 'clk-bcm', 'clk-st' and 'clk-ast2... | Stephen Boyd | 10 | -66/+136 |
| 2020-06-01 | Merge branches 'clk-tegra', 'clk-imx', 'clk-zynq', 'clk-socfpga', 'clk-at91' ... | Stephen Boyd | 52 | -346/+1805 |
| 2020-06-01 | Merge branches 'clk-selectable', 'clk-amlogic', 'clk-renesas', 'clk-samsung' ... | Stephen Boyd | 14 | -82/+443 |
| 2020-05-27 | clk: ast2600: Fix AHB clock divider for A1 | Eddie James | 1 | -6/+25 |
| 2020-05-27 | clk: clk-flexgen: fix clock-critical handling | Alain Volmat | 1 | -0/+1 |
| 2020-05-27 | clk: bcm2835: Constify struct debugfs_reg32 | Rikard Falkeborn | 1 | -3/+3 |
| 2020-05-26 | clk: sprd: add mipi_csi_xx gate clocks | Chunyan Zhang | 1 | -0/+32 |
| 2020-05-26 | clk: sprd: check its parent status before reading gate clock | Chunyan Zhang | 2 | -0/+16 |
| 2020-05-26 | clk: versatile: remove redundant assignment to pointer clk | Colin Ian King | 1 | -1/+1 |
| 2020-05-26 | clk: ti: dra7: remove two unused symbols | Jason Yan | 1 | -9/+0 |
| 2020-05-26 | clk: at91: allow setting all PMC clock parents via DT | Michał Mirosław | 10 | -10/+38 |
| 2020-05-26 | clk: at91: allow setting PCKx parent via DT | Michał Mirosław | 12 | -13/+45 |
| 2020-05-26 | clk: at91: optimize pmc data allocation | Michał Mirosław | 12 | -37/+20 |
| 2020-05-26 | clk: at91: pmc: decrement node's refcount | Claudiu Beznea | 1 | -0/+1 |
| 2020-05-26 | clk: at91: pmc: do not continue if compatible not located | Claudiu Beznea | 1 | -0/+2 |
| 2020-05-26 | clk: at91: Add peripheral clock for PTC | Codrin Ciubotariu | 1 | -0/+1 |
| 2020-05-26 | clk: sprd: return correct type of value for _sprd_pll_recalc_rate | Chunyan Zhang | 1 | -1/+1 |
| 2020-05-26 | clk: sprd: mark the local clock symbols static | Chunyan Zhang | 1 | -16/+16 |
| 2020-05-26 | clk: socfpga: agilex: add clock driver for the Agilex platform | Dinh Nguyen | 5 | -1/+528 |
| 2020-05-26 | clk: socfpga: add const to _ops data structures | Dinh Nguyen | 3 | -4/+4 |
| 2020-05-26 | clk: socfpga: remove clk_ops enable/disable methods | Dinh Nguyen | 3 | -6/+0 |
| 2020-05-26 | clk: socfpga: stratix10: use new parent data scheme | Dinh Nguyen | 5 | -41/+146 |
| 2020-05-26 | clk: zynqmp: Make zynqmp_clk_get_max_divisor static | YueHaibing | 1 | -1/+1 |
| 2020-05-26 | clk: zynqmp: Update fraction clock check from custom type flags | Tejas Patel | 1 | -2/+4 |
| 2020-05-26 | clk: zynqmp: Add support for custom type flags | Rajan Vaja | 2 | -0/+5 |
| 2020-05-26 | clk: zynqmp: fix memory leak in zynqmp_register_clocks | Quanyang Wang | 1 | -6/+9 |
| 2020-05-26 | clk: zynqmp: Fix invalid clock name queries | Rajan Vaja | 1 | -0/+5 |
| 2020-05-26 | clk: zynqmp: Fix divider2 calculation | Tejas Patel | 1 | -5/+12 |
| 2020-05-26 | clk: zynqmp: Limit bestdiv with maxdiv | Rajan Vaja | 1 | -0/+2 |
| 2020-05-26 | clk: bcm2835: Remove casting to bcm2835_clk_register | Nathan Chancellor | 1 | -31/+37 |
| 2020-05-26 | clk: bcm2835: Fix return type of bcm2835_register_gate | Nathan Chancellor | 1 | -5/+5 |
| 2020-05-21 | clk: imx: use imx8m_clk_hw_composite_bus for i.MX8M bus clk slice | Peng Fan | 4 | -39/+39 |
| 2020-05-21 | clk: imx: add imx8m_clk_hw_composite_bus | Peng Fan | 2 | -0/+12 |
| 2020-05-21 | clk: imx: add mux ops for i.MX8M composite clk | Peng Fan | 1 | -1/+50 |
| 2020-05-20 | clk: imx8m: migrate A53 clk root to use composite core | Peng Fan | 3 | -9/+9 |
| 2020-05-20 | clk: imx8mp: use imx8m_clk_hw_composite_core to simplify code | Peng Fan | 1 | -31/+16 |
| 2020-05-20 | clk: imx8mp: Define gates for pll1/2 fixed dividers | Peng Fan | 1 | -18/+36 |
| 2020-05-20 | clk: imx: imx8mp: fix pll mux bit | Peng Fan | 1 | -10/+10 |
| 2020-05-20 | clk: imx8m: drop clk_hw_set_parent for A53 | Peng Fan | 4 | -12/+0 |
| 2020-05-19 | clk: samsung: exynos5433: Add IGNORE_UNUSED flag to sclk_i2s1 | Marek Szyprowski | 1 | -1/+2 |
| 2020-05-19 | ARM/SAMSUNG EXYNOS ARM ARCHITECTURES: Use fallthrough; | Joe Perches | 1 | -1/+1 |
| 2020-05-18 | clk: renesas: cpg-mssr: Fix STBCR suspend/resume handling | Geert Uytterhoeven | 1 | -3/+5 |
| 2020-05-14 | clk: ti: dra7xx: fix RNG clock parent | Tero Kristo | 1 | -1/+1 |
| 2020-05-14 | clk: ti: dra7xx: mark MCAN clock as DRA76x only | Tero Kristo | 1 | -1/+1 |
| 2020-05-14 | clk: ti: dra7xx: fix gpu clkctrl parent | Tero Kristo | 1 | -1/+1 |
| 2020-05-14 | clk: ti: omap5: Add proper parent clocks for l4-secure clocks | Tero Kristo | 1 | -7/+7 |
| 2020-05-14 | clk: ti: omap4: Add proper parent clocks for l4-secure clocks | Tero Kristo | 1 | -7/+7 |
| 2020-05-14 | clk: ti: composite: fix memory leak | Tero Kristo | 1 | -0/+1 |
| 2020-05-13 | clk: samsung: Fix CLK_SMMU_FIMCL3 clock name on Exynos542x | Marek Szyprowski | 1 | -1/+1 |
| 2020-05-13 | clk: samsung: Mark top ISP and CAM clocks on Exynos542x as critical | Marek Szyprowski | 1 | -7/+9 |
