Age | Commit message (Expand) | Author | Files | Lines |
2019-12-01 | Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl... | Linus Torvalds | 115 | -2241/+7936 |
2019-11-27 | Merge branches 'clk-ingenic', 'clk-init-leak', 'clk-ux500' and 'clk-bitmain' ... | Stephen Boyd | 12 | -10/+1284 |
2019-11-27 | Merge branches 'clk-gpio-flags', 'clk-tegra', 'clk-rockchip', 'clk-sprd' and ... | Stephen Boyd | 28 | -210/+1031 |
2019-11-27 | Merge branches 'clk-ti', 'clk-allwinner', 'clk-qcom', 'clk-sa' and 'clk-aspee... | Stephen Boyd | 32 | -297/+3480 |
2019-11-27 | Merge branches 'clk-hisi', 'clk-amlogic', 'clk-samsung', 'clk-renesas' and 'c... | Stephen Boyd | 28 | -1530/+2058 |
2019-11-27 | Merge branches 'clk-rohm', 'clk-hisilicon', 'clk-marvell', 'clk-unused' and '... | Stephen Boyd | 21 | -199/+130 |
2019-11-26 | clk: aspeed: Add RMII RCLK gates for both AST2500 MACs | Andrew Jeffery | 1 | -1/+26 |
2019-11-22 | clk: Add common clock driver for BM1880 SoC | Manivannan Sadhasivam | 3 | -0/+977 |
2019-11-22 | clk: Add clk_hw_unregister_composite helper function definition | Manivannan Sadhasivam | 1 | -0/+11 |
2019-11-22 | clk: Zero init clk_init_data in helpers | Manivannan Sadhasivam | 5 | -5/+5 |
2019-11-22 | clk: ingenic: Allow drivers to be built with COMPILE_TEST | Stephen Boyd | 1 | -1/+1 |
2019-11-19 | clk: mark clk_disable_unused() as __init | Rasmus Villemoes | 1 | -4/+4 |
2019-11-19 | clk: Fix memory leak in clk_unregister() | Kishon Vijay Abraham I | 1 | -0/+1 |
2019-11-13 | clk: Ingenic: Add CGU driver for X1000. | Zhou Yanjie | 3 | -0/+285 |
2019-11-13 | clk: tegra: Use match_string() helper to simplify the code | YueHaibing | 1 | -8/+4 |
2019-11-13 | clk: pxa: fix one of the pxa RTC clocks | Robert Jarzmik | 1 | -0/+1 |
2019-11-13 | clk: sprd: Use IS_ERR() to validate the return value of syscon_regmap_lookup_... | Baolin Wang | 1 | -1/+1 |
2019-11-13 | clk: armada-xp: remove unused code | YueHaibing | 1 | -26/+0 |
2019-11-11 | clk: tegra: Fix build error without CONFIG_PM_SLEEP | YueHaibing | 1 | -0/+2 |
2019-11-11 | clk: tegra: Optimize PLLX restore on Tegra20/30 | Dmitry Osipenko | 2 | -18/+32 |
2019-11-11 | clk: tegra: Add suspend and resume support on Tegra210 | Sowjanya Komatineni | 3 | -4/+163 |
2019-11-11 | clk: tegra: Share clk and rst register defines with Tegra clock driver | Sowjanya Komatineni | 2 | -45/+45 |
2019-11-11 | clk: tegra: Use fence_udelay() during PLLU init | Sowjanya Komatineni | 1 | -4/+4 |
2019-11-11 | clk: tegra: clk-dfll: Add suspend and resume support | Sowjanya Komatineni | 3 | -0/+59 |
2019-11-11 | clk: tegra: clk-super: Add restore-context support | Sowjanya Komatineni | 1 | -0/+27 |
2019-11-11 | clk: tegra: clk-super: Fix to enable PLLP branches to CPU | Sowjanya Komatineni | 4 | -1/+39 |
2019-11-11 | clk: tegra: periph: Add restore_context support | Sowjanya Komatineni | 2 | -0/+37 |
2019-11-11 | clk: tegra: Support for OSC context save and restore | Sowjanya Komatineni | 2 | -0/+16 |
2019-11-11 | clk: tegra: pll: Save and restore pll context | Sowjanya Komatineni | 1 | -32/+54 |
2019-11-11 | clk: tegra: pllout: Save and restore pllout context | Sowjanya Komatineni | 1 | -0/+9 |
2019-11-11 | clk: tegra: divider: Save and restore divider rate | Sowjanya Komatineni | 1 | -0/+11 |
2019-11-11 | clk: tegra: Reimplement SOR clocks on Tegra210 | Thierry Reding | 1 | -16/+55 |
2019-11-11 | clk: tegra: Reimplement SOR clock on Tegra124 | Thierry Reding | 1 | -9/+13 |
2019-11-11 | clk: tegra: Rename sor0_lvds to sor0_out | Thierry Reding | 3 | -8/+8 |
2019-11-11 | clk: tegra: Move SOR0 implementation to Tegra124 | Thierry Reding | 2 | -8/+49 |
2019-11-11 | clk: tegra: Remove last remains of TEGRA210_CLK_SOR1_SRC | Thierry Reding | 2 | -2/+2 |
2019-11-11 | Merge branch 'for-5.5/clk-core' into for-5.5/clk | Thierry Reding | 1 | -0/+18 |
2019-11-11 | clk: tegra: Add Tegra20/30 EMC clock implementation | Dmitry Osipenko | 5 | -52/+339 |
2019-11-11 | clk: Add API to get index of the clock parent | Sowjanya Komatineni | 1 | -0/+18 |
2019-11-08 | clk: clk-gpio: propagate rate change to parent | Michael Hennerich | 1 | -1/+1 |
2019-11-08 | clk: qcom: rpmh: Reuse sdm845 clks for sm8150 | Stephen Boyd | 1 | -20/+14 |
2019-11-08 | clk/ti/adpll: allocate room for terminating null | Stephen Kitt | 1 | -9/+2 |
2019-11-08 | clk: ast2600: Add RMII RCLK gates for all four MACs | Andrew Jeffery | 1 | -1/+46 |
2019-11-08 | drivers/clk: convert VL struct to struct_size | Stephen Kitt | 7 | -14/+9 |
2019-11-08 | Merge tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/... | Linus Torvalds | 14 | -27/+82 |
2019-11-07 | clk: qcom: Add MSM8998 GPU Clock Controller (GPUCC) driver | Jeffrey Hugo | 3 | -0/+348 |
2019-11-07 | clk: qcom: Allow constant ratio freq tables for rcg | Jeffrey Hugo | 2 | -0/+5 |
2019-11-07 | clk: qcom: smd: Add missing pnoc clock | Jeffrey Hugo | 1 | -0/+3 |
2019-11-07 | clk: qcom: Enumerate clocks and reset needed to boot the 8998 modem | Jeffrey Hugo | 1 | -0/+72 |
2019-11-07 | clk: qcom: clk-rpmh: Add support for RPMHCC for SC7180 | Taniya Das | 1 | -0/+19 |