linux - Linux Kernel (branches are rebased on master from time to time)

Age	Commit message (Expand)	Author	Files	Lines
2016-06-23	clk: tegra: Make sor_safe the parent of dpaux and dpaux1	Thierry Reding	1	-2/+2
2016-06-22	Merge remote-tracking branch 'clk/clk-s905' into clk-next	Michael Turquette	12	-594/+1793
2016-06-22	clk: gxbb: add AmLogic GXBB clk controller driver	Michael Turquette	4	-0/+1233
2016-06-22	clk: meson: fractional pll support	Michael Turquette	2	-2/+45
2016-06-22	clk: meson: add mpll support	Michael Turquette	3	-1/+105
2016-06-22	clk: meson: add peripheral gate macro	Michael Turquette	1	-0/+14
2016-06-22	clk: meson: only build selected platforms	Michael Turquette	4	-3/+16
2016-06-22	clk: meson8b: convert to platform_driver	Michael Turquette	1	-18/+49
2016-06-22	clk: meson8b: clean up composite clocks	Michael Turquette	4	-246/+66
2016-06-22	clk: meson8b: remove mali clk	Michael Turquette	1	-22/+0
2016-06-22	clk: meson8b: clean up cpu clocks	Michael Turquette	4	-90/+59
2016-06-22	clk: meson8b: clean up fixed factor clocks	Michael Turquette	3	-71/+60
2016-06-22	clk: meson8b: clean up pll clocks	Michael Turquette	4	-114/+131
2016-06-22	clk: meson8b: clean up fixed rate clocks	Michael Turquette	3	-75/+54
2016-06-22	clk: meson8b: rectify reg offsets with datasheet	Michael Turquette	1	-3/+12
2016-06-22	clk: tegra: Mark timer clock as critical	Thierry Reding	1	-1/+1
2016-06-22	ARM: dts: AM43xx: clk: Add RNG clk node	Lokesh Vutla	1	-0/+1
2016-06-22	clk: rockchip: fix incorrect rk3228 clock registers	Xing Zheng	1	-9/+9
2016-06-21	clk: renesas: r8a7795: Add THS/TSC clock	Khiem Nguyen	1	-0/+1
2016-06-21	clk: renesas: r8a7795: Add DRIF clock	Ramesh Shanmugasundaram	1	-0/+8
2016-06-21	clk: renesas: r8a7795: Correct lvds clock parent	Geert Uytterhoeven	1	-1/+1
2016-06-21	clk: renesas: r8a7795: Provide FDP1 clocks	Kieran Bingham	1	-0/+3
2016-06-21	clk: renesas: Add R8A7792 support	Sergei Shtylyov	2	-0/+2
2016-06-20	Merge tag 'clk-samsung-4.8' of git://linuxtv.org/snawrocki/samsung into clk-next	Stephen Boyd	22	-491/+756
2016-06-20	clk: correct comments for __clk_determine_rate	Peng Fan	1	-3/+1
2016-06-20	clk: vt8500: rework wm8650_find_pll_bits()	Roman Volkov	1	-35/+38
2016-06-20	clk: vt8500: fix gcc-4.9 warnings	Arnd Bergmann	1	-24/+10
2016-06-20	clk: Remove unused variable	Lee Jones	1	-2/+1
2016-06-20	clk: hi6220: fix missing clk.h include	Ben Dooks	1	-0/+2
2016-06-20	clk: iproc: fix missing include of clk-iproc.h	Ben Dooks	1	-0/+2
2016-06-20	clk: at91: make of_sama5d2_clk_generated_setup() static	Ben Dooks	1	-1/+1
2016-06-20	Merge branch 'clk-fixes' into clk-next	Stephen Boyd	4	-17/+11
2016-06-20	Merge tag 'v4.7-rockchip-clk-fixes1' of git://git.kernel.org/pub/scm/linux/ke...	Stephen Boyd	3	-15/+9
2016-06-20	clk: Fix return value check in oxnas_stdclk_probe()	Wei Yongjun	1	-2/+2
2016-06-20	clk: multiplier: Prevent the multiplier from under / over flowing	Maxime Ripard	1	-3/+17
2016-06-17	clk: tegra: Enable sor1 and sor1_src on Tegra210	Thierry Reding	1	-0/+2
2016-06-17	clk: tegra: Squash sor1 safe/brick/src into a single mux	Thierry Reding	2	-12/+12
2016-06-17	clk: tegra: Disable spread spectrum on pll_d2	Thierry Reding	1	-2/+3
2016-06-16	Merge commit 'f17a0dd1c2e0' into clk-next	Michael Turquette	1	-4/+4
2016-06-16	clk: sunxi: remove unused variable	Arnd Bergmann	1	-1/+0
2016-06-16	clk: imx6ul: fix gpt2 clock names	Dong Aisheng	1	-2/+2
2016-06-16	clk: imx: refine the powerdown bit of clk-pllv3	Dong Aisheng	1	-10/+10
2016-06-15	clk: Use _rcuidle suffix to allow clk_core_enable() to used from idle	Paul E. McKenney	1	-2/+2
2016-06-15	clk: Add _rcuidle tracepoints to allow clk_core_disable() use from idle	Paul E. McKenney	1	-2/+2
2016-06-13	clk: imx: clk-pllv3: fix incorrect handle of enet powerdown bit	Dong Aisheng	1	-4/+4
2016-06-12	clk: imx: fix pll clock parents	Dong Aisheng	5	-34/+34
2016-06-12	clk: imx7d: correct dram pll type	Anson Huang	1	-1/+1
2016-06-12	clk: imx7d: correct dram root clk parent select	Anson Huang	1	-1/+1
2016-06-12	clk: imx: correct AV PLL rate formula	Anson Huang	1	-2/+6
2016-06-10	clk: tegra: Fixup post dividers on Tegra210	Thierry Reding	1	-47/+47