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path: root/drivers/clk/zynq/clkc.c
AgeCommit message (Expand)AuthorFilesLines
2019-06-05treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 401Thomas Gleixner1-12/+1
2019-04-23clk: core: replace clk_{readl,writel} with {readl,writel}Jonas Gorski1-3/+3
2018-08-30clk: Convert to using %pOFn instead of device_node.nameRob Herring1-2/+2
2016-03-02clk: zynq: Remove CLK_IS_ROOTStephen Boyd1-2/+1
2015-07-20clk: zynq: Include clk.hStephen Boyd1-0/+1
2015-06-04clk: make several parent names constUwe Kleine-König1-9/+16
2015-04-12clk: don't use __initconst for non-const arraysUwe Kleine-König1-12/+12
2015-01-27clk: zynq: Force CPU_2X clock to be ungatedSoren Brinkmann1-0/+1
2014-09-09clk: zynq: Move const initdata into correct code sectionSoren Brinkmann1-15/+14
2014-09-09clk: zynq: Remove pointless return at end of void functionSoren Brinkmann1-1/+0
2014-04-22clk: zynq: Leave debug clocks in bootup stateSoren Brinkmann1-0/+12
2014-04-05Merge tag 'clk-for-linus-3.15' of git://git.linaro.org/people/mike.turquette/...Linus Torvalds1-2/+2
2014-03-17ARM: zynq: Move of_clk_init from clock driverMichal Simek1-2/+0
2014-02-25clk: zynq: Use clk_readl/clk_writel helper functionMichal Simek1-2/+2
2014-02-10ARM: zynq: Map I/O memory on clkc initMichal Simek1-26/+63
2013-12-20clk/zynq/clkc: Add 'fclk-enable' featureSoren Brinkmann1-3/+15
2013-10-07clk/zynq: Fix possible memory leakFelipe Pena1-1/+15
2013-09-09Merge tag 'clk-for-linus-3.12' of git://git.linaro.org/people/mturquette/linuxLinus Torvalds1-34/+48
2013-08-19clk: add CLK_SET_RATE_NO_REPARENT flagJames Hogan1-36/+50
2013-08-13clk/zynq/clkc: Add CLK_SET_RATE_PARENT flag to ethernet muxesSoren Brinkmann1-4/+6
2013-08-13clk/zynq/clkc: Add dedicated spinlock for the SWDTSoren Brinkmann1-1/+2
2013-05-27clk: zynq: Add clock controller driverSoren Brinkmann1-0/+533