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path: root/drivers/clk/tegra/clk-bpmp.c
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2022-11-19clk: tegra: Support BPMP-FW ABI deny flagsPeter De Schrijver1-3/+34
Support BPMP_CLK_STATE_CHANGE_DENIED by not populating state changing operations when the flag is set. Support BPMP_CLK_RATE_PARENT_CHANGE_DENIED by not populating rate or parent changing operations when the flag is set. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-08-22clk: move from strlcpy with unused retval to strscpyWolfram Sang1-1/+1
Follow the advice of the below link and prefer 'strscpy' in this subsystem. Conversion is 1:1 because the return value is not used. Generated by a coccinelle script. Link: https://lore.kernel.org/r/CAHk-=wgfRnXz0W3D37d01q3JFkr_i_uTL=V6A6G1oUZcprmknw@mail.gmail.com/ Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20220818210000.6600-1-wsa+renesas@sang-engineering.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-05-04clk: tegra: Replace .round_rate() with .determine_rate()Rajkumar Kasirajan1-5/+10
Replace the .round_rate() callback with .determine_rate() which can consider max_rate imposed by clk_set_max_rate() while rounding the clock rate. Note that if the .determine_rate() callback is defined it will be called instead of the .round_rate() callback when calling clk_round_rate(). By using .determine_rate(), the maximum rate returned when calling clk_round_rate() is now limited by the current max_rate. Signed-off-by: Rajkumar Kasirajan <rkasirajan@nvidia.com> [jonathanh@nvidia.com: checkpatch fixes and commit message update] Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-05-04clk: tegra: Register clocks from root to leafTimo Alho1-16/+56
Current clock initialization causes intermediate registering of orphan clocks (i.e. a clock without a parent registered). CCF keeps track of orphan clocks and any time a new clock is registered, it will loop through the list of orphan and queries if the parent is now available. This operation triggers one or more clock operations, which are IPCs with BPMP-FW. Hence, due to the order in which the clocks appear currently, this causes > 5000 IPC messages to be sent to BPMP-FW during clock initialization. Optimize the clock probing by registering clocks hierarchically from root clock towards leafs. Signed-off-by: Timo Alho <talho@nvidia.com> [jonathanh@nvidia.com: checkpatch fixes] Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-26clk: tegra: bpmp: Clamp clock rates on requestsSivaram Nair1-3/+3
BPMP firmware ABI expects the rate inputs in int64_t. However, tegra_bpmp_clk_round_rate() and tegra_bpmp_clk_set_rate() functions directly assign 'unsigned long' inputs to a int64_t value causing unexpected rounding errors. Fix this by clipping the input rate to S64_MAX. Signed-off-by: Sivaram Nair <sivaramn@nvidia.com> [mperttunen: slight cleanup] Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Reviewed-by: Sivaram Nair <sivaramn@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-06-19treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500Thomas Gleixner1-4/+1
Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation # extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 4122 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Enrico Weigelt <info@metux.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2018-07-08clk: tegra: bpmp: Don't crash when a clock fails to registerMikko Perttunen1-3/+9
When registering clocks, we just skip any that fail to register (leaving a NULL hole in the clock table). However, our of_xlate function still tries to dereference each entry while looking for the clock with the requested id, causing a crash if any clocks failed to register. Add a check to of_xlate to skip any NULL clocks. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Acked-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2017-10-19clk: tegra: Check BPMP response return codeTimo Alho1-5/+10
Check return code in BPMP response message(s). The typical error case is when a clock operation is attempted with an invalid clock identifier. Also remove error print from call to clk_get_info() as the implementation loops through the range of all possible identifiers, yet the operation is expected to error out when the clock ID is unused. Signed-off-by: Timo Alho <talho@nvidia.com> Acked-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-02-03clk: tegra: Add BPMP clock driverThierry Reding1-0/+620
This driver uses the services provided by the BPMP firmware driver to implement a clock driver based on the MRQ_CLK request. This part of the BPMP ABI provides a means to enumerate and control clocks and should allow the driver to work on any chip that supports this ABI. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>