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path:
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/
drivers
/
clk
/
sunxi-ng
Age
Commit message (
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Author
Files
Lines
2019-03-08
Merge branches 'clk-optional', 'clk-devm-clkdev-register', 'clk-allwinner', '...
Stephen Boyd
1
-1
/
+1
2019-01-28
clk: sunxi: A31: Fix wrong AHB gate number
Andre Przywara
1
-2
/
+2
2019-01-25
clk: sunxi-ng: sun8i-a23: Enable PLL-MIPI LDOs when ungating it
Chen-Yu Tsai
1
-1
/
+1
2019-01-22
clk: sunxi-ng: v3s: Fix TCON reset de-assert bit
Paul Kocialkowski
1
-1
/
+1
2018-12-10
clk: sunxi-ng: a64: Allow parent change for VE clock
Jernej Skrabec
1
-1
/
+1
2018-12-05
clk: sunxi-ng: a33: Set CLK_SET_RATE_PARENT for all audio module clocks
Chen-Yu Tsai
1
-3
/
+3
2018-12-05
clk: sunxi-ng: a33: Use sigma-delta modulation for audio PLL
Chen-Yu Tsai
1
-13
/
+24
2018-12-04
clk: sunxi-ng: h3: Allow parent change for ve clock
Jernej Skrabec
1
-1
/
+1
2018-12-04
clk: sunxi-ng: add support for suniv F1C100s SoC
Mesih Kilinc
4
-0
/
+581
2018-12-03
clk: sunxi-ng: h3/h5: Fix CSI_MCLK parent
Chen-Yu Tsai
1
-1
/
+1
2018-11-30
clk: sunxi-ng: r40: Force LOSC parent to RTC LOSC output
Chen-Yu Tsai
1
-0
/
+11
2018-11-23
clk: sunxi-ng: sun50i: a64: Use sigma-delta modulation for audio PLL
Chen-Yu Tsai
1
-13
/
+24
2018-11-13
clk: sunxi-ng: a64: Fix gate bit of DSI DPHY
Jagan Teki
1
-1
/
+1
2018-11-13
clk: sunxi-ng: Enable DE2_CCU for SUN8I and SUN50I
Jagan Teki
1
-0
/
+1
2018-11-05
clk: sunxi-ng: Add support for H6 DE3 clocks
Jernej Skrabec
2
-4
/
+71
2018-11-05
clk: sunxi-ng: h6: Set video PLLs limits
Jernej Skrabec
1
-0
/
+4
2018-11-05
clk: sunxi-ng: Use u64 for calculation of NM rate
Jernej Skrabec
1
-3
/
+15
2018-11-05
clk: sunxi-ng: Adjust MP clock parent rate when allowed
Jernej Skrabec
1
-2
/
+62
2018-11-05
clk: sunxi-ng: sun50i: h6: Fix MMC clock mux width
Jagan Teki
1
-3
/
+3
2018-11-05
clk: sunxi-ng: enable so-said LDOs for A64 SoC's pll-mipi clock
Icenowy Zheng
1
-1
/
+6
2018-10-31
Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...
Linus Torvalds
10
-86
/
+143
2018-09-07
clk: sunxi-ng: sun4i: Set VCO and PLL bias current to lowest setting
Chen-Yu Tsai
1
-1
/
+9
2018-09-05
dt-bindings: clock: sun50i-a64-ccu: Add PLL_VIDEO0 macro
Jagan Teki
1
-1
/
+3
2018-09-05
clk: sunxi-ng: a64: Add max. rate constraint to video PLLs
Icenowy Zheng
1
-24
/
+26
2018-09-05
clk: sunxi-ng: a64: Add minimal rate for video PLLs
Jagan Teki
1
-22
/
+24
2018-09-05
clk: sunxi-ng: sun50i: h6: Add 2x fixed post-divider to MMC module clocks
Icenowy Zheng
1
-20
/
+23
2018-08-27
clk: sunxi-ng: a83t: Add max. rate constraint to video PLLs
Jernej Skrabec
1
-0
/
+2
2018-08-27
clk: sunxi-ng: nkmp: Add constraint for maximum rate
Jernej Skrabec
2
-0
/
+8
2018-08-27
clk: sunxi-ng: r40: Add max. rate constraint to video PLLs
Jernej Skrabec
1
-26
/
+26
2018-08-27
clk: sunxi-ng: h3/h5: Add max. rate constraint to pll-video
Jernej Skrabec
1
-12
/
+13
2018-08-27
clk: sunxi-ng: Add maximum rate constraint to NM PLLs
Jernej Skrabec
2
-0
/
+37
2018-08-27
clk: sunxi-ng: h6: fix PWM gate/reset offset
Rongyi Chen
1
-1
/
+1
2018-08-27
clk: sunxi-ng: h6: fix bus clocks' divider position
Icenowy Zheng
1
-4
/
+4
2018-08-15
Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...
Linus Torvalds
3
-35
/
+42
2018-06-27
clk: sunxi-ng: add A64 compatible string
Icenowy Zheng
1
-7
/
+4
2018-06-27
clk: sunxi-ng: r40: Export video PLLs
Jernej Skrabec
1
-2
/
+6
2018-06-27
clk: sunxi-ng: r40: Allow setting parent rate to display related clocks
Jernej Skrabec
1
-4
/
+8
2018-06-27
clk: sunxi-ng: r40: Add minimal rate for video PLLs
Jernej Skrabec
1
-22
/
+24
2018-06-21
clk: sunxi-ng: replace lib-y with obj-y
Masahiro Yamada
1
-24
/
+15
2018-05-17
clk: sunxi-ng: r40: export a regmap to access the GMAC register
Icenowy Zheng
1
-0
/
+33
2018-05-17
clk: sunxi-ng: r40: rewrite init code to a platform driver
Icenowy Zheng
1
-11
/
+28
2018-05-04
clk: sunxi-ng: add support for H6 PRCM CCU
Icenowy Zheng
4
-0
/
+232
2018-04-13
Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...
Linus Torvalds
10
-35
/
+1375
2018-03-21
clk: sunxi-ng: add missing hdmi-slow clock for H6 CCU
Icenowy Zheng
2
-1
/
+5
2018-03-18
clk: sunxi-ng: add support for the Allwinner H6 CCU
Icenowy Zheng
4
-0
/
+1269
2018-03-18
clk: sunxi-ng: Support fixed post-dividers on NKMP style clocks
Icenowy Zheng
2
-3
/
+19
2018-03-02
clk: sunxi-ng: h3: h5: export CLK_PLL_VIDEO
Jernej Skrabec
1
-1
/
+3
2018-03-02
clk: sunxi-ng: h3: h5: Allow some clocks to set parent rate
Jernej Skrabec
1
-3
/
+6
2018-03-02
clk: sunxi-ng: h3: h5: Add minimal rate for video PLL
Jernej Skrabec
1
-11
/
+12
2018-03-02
clk: sunxi-ng: Add check for minimal rate to NM PLLs
Jernej Skrabec
2
-0
/
+34
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