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path: root/drivers/clk/sunxi-ng
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2020-02-03Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds5-8/+33
2020-01-04clk: sunxi: a23/a33: Export the MIPI PLLMaxime Ripard1-1/+3
2020-01-04clk: sunxi: a31: Export the MIPI PLLMaxime Ripard1-1/+3
2020-01-04clk: sunxi-ng: a64: export CLK_CPUX clock for DVFSVasily Khoruzhick1-1/+0
2020-01-04clk: sunxi-ng: add mux and pll notifiers for A64 CPU clockIcenowy Zheng1-1/+27
2020-01-03clk: sunxi-ng: r40: Export MBUS clockChen-Yu Tsai1-4/+0
2020-01-02clk: sunxi-ng: h6-r: Fix AR100/R_APB2 parent orderSamuel Holland1-2/+2
2020-01-02clk: sunxi-ng: h6-r: Simplify R_APB1 clock definitionSamuel Holland1-11/+1
2020-01-02clk: sunxi-ng: sun8i-r: Fix divider on APB0 clockSamuel Holland1-18/+3
2019-12-18clk: sunxi-ng: r40: Allow setting parent rate for external clock outputsChen-Yu Tsai1-2/+4
2019-12-09clk: sunxi-ng: v3s: Fix incorrect number of hw_clks.Yunhao Tian2-4/+2
2019-12-01Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds2-11/+16
2019-11-05clk: sunxi-ng: h3: Export MBUS clockJernej Skrabec1-4/+0
2019-10-29clk: sunxi-ng: a80: fix the zero'ing of bits 16 and 18Colin Ian King1-1/+1
2019-10-02clk: sunxi-ng: h6: Allow GPU to change parent rateJernej Skrabec1-1/+1
2019-09-30clk: sunxi-ng: h6: Use sigma-delta modulation for audio PLLJernej Skrabec1-6/+15
2019-09-19Merge branches 'clk-init-destroy', 'clk-doc', 'clk-imx' and 'clk-allwinner' i...Stephen Boyd4-14/+255
2019-08-21clk: sunxi-ng: h6: Allow I2S to change parent rateJernej Skrabec1-4/+4
2019-08-16clk: sunxi: Don't call clk_hw_get_name() on a hw that isn't registeredStephen Boyd1-2/+3
2019-08-12clk: sunxi-ng: v3s: add Allwinner V3 supportIcenowy Zheng2-3/+227
2019-08-12clk: sunxi-ng: v3s: add missing clock slices for MMC2 module clocksIcenowy Zheng1-0/+3
2019-07-22clk: sunxi-ng: v3s: add the missing PLL_DDR1Icenowy Zheng2-6/+19
2019-07-17Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds16-221/+397
2019-06-24Merge tag 'sunxi-ng-parent-rewrite-part-1-take-2' of https://git.kernel.org/p...Stephen Boyd16-220/+396
2019-06-22clk: sunxi-ng: sun8i-r: Use local parent references for SUNXI_CCU_GATEChen-Yu Tsai1-14/+23
2019-06-22clk: sunxi-ng: a80-usb: Use local parent references for SUNXI_CCU_GATEChen-Yu Tsai1-12/+20
2019-06-22clk: sunxi-ng: gate: Add macros for referencing local clock parentsChen-Yu Tsai1-0/+53
2019-06-22clk: sunxi-ng: h6-r: Use local parent references for CLK_FIXED_FACTORChen-Yu Tsai1-1/+1
2019-06-22clk: sunxi-ng: h6: Use local parent references for CLK_FIXED_FACTORChen-Yu Tsai1-25/+44
2019-06-22clk: sunxi-ng: a64: Use local parent references for CLK_FIXED_FACTORChen-Yu Tsai1-15/+26
2019-06-22clk: sunxi-ng: f1c100s: Use local parent references for CLK_FIXED_FACTORChen-Yu Tsai1-10/+19
2019-06-18clk: sunxi-ng: sun8i-r: Use local parent references for CLK_FIXED_FACTORChen-Yu Tsai1-1/+1
2019-06-18clk: sunxi-ng: v3s: Use local parent references for CLK_FIXED_FACTORChen-Yu Tsai1-10/+19
2019-06-18clk: sunxi-ng: r40: Use local parent references for CLK_FIXED_FACTORChen-Yu Tsai1-17/+29
2019-06-18clk: sunxi-ng: h3: Use local parent references for CLK_FIXED_FACTORChen-Yu Tsai1-10/+19
2019-06-18clk: sunxi-ng: a33: Use local parent references for CLK_FIXED_FACTORChen-Yu Tsai1-12/+22
2019-06-18clk: sunxi-ng: a23: Use local parent references for CLK_FIXED_FACTORChen-Yu Tsai1-12/+22
2019-06-18clk: sunxi-ng: a31: Use local parent references for CLK_FIXED_FACTORChen-Yu Tsai1-14/+25
2019-06-18clk: sunxi-ng: sun5i: Use local parent references for CLK_FIXED_FACTORChen-Yu Tsai1-12/+22
2019-06-18clk: sunxi-ng: a10: Use local parent references for CLK_FIXED_FACTORChen-Yu Tsai1-14/+25
2019-06-18clk: sunxi-ng: sun8i-r: Use local parent references for CLK_HW_INIT_*Chen-Yu Tsai1-40/+25
2019-06-18clk: sunxi-ng: switch to of_clk_hw_register() for registering clksChen-Yu Tsai1-1/+1
2019-06-05treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 282Thomas Gleixner28-252/+28
2019-06-05clk: sunxi-ng: sun50i-h6-r: Fix incorrect W1 clock gate registerOndrej Jirman1-1/+1
2019-05-30treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157Thomas Gleixner15-150/+15
2019-05-30treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152Thomas Gleixner13-65/+13
2019-05-21treewide: Add SPDX license identifier - Makefile/KconfigThomas Gleixner1-0/+1
2019-05-15clk: Remove io.h from clk-provider.hStephen Boyd26-0/+26
2019-05-07Merge branches 'clk-stm32f4', 'clk-tegra', 'clk-at91', 'clk-sifive-fu540' and...Stephen Boyd2-3/+3
2019-05-07Merge branches 'clk-hisi', 'clk-lochnagar', 'clk-allwinner', 'clk-rockchip' a...Stephen Boyd6-13/+23