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path: root/drivers/clk/sunxi-ng
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2018-02-19clk: sunxi-ng: a31: Fix CLK_OUT_* clock opsChen-Yu Tsai1-3/+3
2018-01-26Merge branches 'clk-aspeed', 'clk-lock-UP', 'clk-mediatek' and 'clk-allwinner...Stephen Boyd7-43/+185
2018-01-26Merge branch 'clk-divider-container' into clk-nextStephen Boyd1-1/+1
2018-01-03clk: sunxi-ng: a83t: Add M divider to TCON1 clockJernej Škrabec1-2/+2
2017-12-29clk: sunxi-ng: fix the A64/H5 clock description of DE2 CCUIcenowy Zheng1-3/+3
2017-12-29clk: sunxi-ng: add support for Allwinner H3 DE2 CCUIcenowy Zheng1-0/+47
2017-12-28clk: divider: fix incorrect usage of container_ofJerome Brunet1-1/+1
2017-12-21clk: move clock common macros out from vendor directoriesChunyan Zhang1-29/+0
2017-12-08clk: sunxi-ng: sun8i: a83t: Use sigma-delta modulation for audio PLLChen-Yu Tsai1-1/+10
2017-12-08clk: sunxi-ng: sun8i: a83t: Add /2 fixed post divider to audio PLLChen-Yu Tsai1-3/+6
2017-12-08clk: sunxi-ng: Support fixed post-dividers on NM style clocksChen-Yu Tsai2-13/+39
2017-12-07clk: sunxi-ng: sun50i: a64: Add 2x fixed post-divider to MMC module clocksChen-Yu Tsai1-20/+37
2017-12-07clk: sunxi-ng: Support fixed post-dividers on MP style clocksChen-Yu Tsai2-2/+42
2017-11-17Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds16-79/+453
2017-11-14clk: sunxi-ng: a83t: Fix i2c buses bitsMylene JOSSERAND1-2/+2
2017-11-02License cleanup: add SPDX GPL-2.0 license identifier to files with no licenseGreg Kroah-Hartman3-0/+3
2017-10-17clk: sunxi-ng: sun4i: Export video PLLsJonathan Liu1-2/+2
2017-10-17clk: sunxi-ng: Add A83T display clocksMaxime Ripard1-8/+13
2017-10-13clk: sunxi-ng: sun8i: a23: Use sigma-delta modulation for audio PLLChen-Yu Tsai1-13/+25
2017-10-13clk: sunxi-ng: sun6i: Use sigma-delta modulation for audio PLLChen-Yu Tsai1-13/+25
2017-10-13clk: sunxi-ng: sun5i: Use sigma-delta modulation for audio PLLChen-Yu Tsai1-6/+19
2017-10-13clk: sunxi-ng: sun4i: Use sigma-delta modulation for audio PLLChen-Yu Tsai1-6/+20
2017-10-13clk: sunxi-ng: sun8i: h3: Use sigma-delta modulation for audio PLLChen-Yu Tsai1-13/+25
2017-10-13clk: sunxi-ng: nm: Add support for sigma-delta modulationChen-Yu Tsai2-1/+46
2017-10-13clk: sunxi-ng: Add sigma-delta modulation supportChen-Yu Tsai4-0/+240
2017-10-13clk: sunxi-ng: nm: Check if requested rate is supported by fractional clockChen-Yu Tsai1-0/+3
2017-10-13clk: sunxi-ng: sun5i: Fix bit offset of audio PLL post-dividerChen-Yu Tsai1-2/+2
2017-10-09clk: sunxi-ng: a83t: Fix invalid csi-mclk mux offsetOndrej Jirman1-1/+1
2017-09-29clk: sunxi-ng: sun6i: Rename HDMI DDC clock to avoid name collisionChen-Yu Tsai1-1/+1
2017-09-29clk: sunxi-ng: sun6i: Export video PLLsChen-Yu Tsai1-2/+6
2017-09-26clk: sunxi-ng: Implement reset control status readbackChen-Yu Tsai1-0/+14
2017-09-17clk: sunxi-ng: Fix missing CLK_SET_RATE_PARENT in ccu-sun4i-a10.cAlexander Syring1-1/+1
2017-09-17clk: sunxi-ng: add CLK_SET_RATE_PARENT flag to H3 GPU clockIcenowy Zheng1-1/+1
2017-09-17clk: sunxi-ng: add CLK_SET_RATE_UNGATE to all H3 PLLsIcenowy Zheng1-9/+9
2017-09-13Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds22-36/+2990
2017-08-31Merge tag 'sunxi-clk-for-4.14-3' of https://git.kernel.org/pub/scm/linux/kern...Stephen Boyd4-0/+1531
2017-08-30clk: sunxi-ng: Provide a default reset hookMaxime Ripard1-0/+12
2017-08-30clk: sunxi-ng: a83t: Support new timing mode for mmc2 clockChen-Yu Tsai1-8/+2
2017-08-30clk: sunxi-ng: Add MP_MMC clocks that support MMC timing modes switchingChen-Yu Tsai2-0/+110
2017-08-30clk: sunxi-ng: Add interface to query or configure MMC timing modes.Chen-Yu Tsai3-0/+75
2017-08-24clk: sunxi-ng: Add sun4i/sun7i CCU driverPriit Laes4-0/+1531
2017-08-23Merge tag 'sunxi-clk-for-4.14-2' of https://git.kernel.org/pub/scm/linux/kern...Stephen Boyd14-22/+1452
2017-08-19clk: sunxi-ng: support R40 SoCIcenowy Zheng4-0/+1365
2017-08-14clk: sunxi-ng: nkm: add support for fixed post-dividerIcenowy Zheng2-3/+21
2017-08-14clk: sunxi-ng: div: Add support for fixed post-dividerPriit Laes2-4/+21
2017-08-04clk: sunxi-ng: allow set parent clock (PLL_CPUX) for CPUX clock on H3Icenowy Zheng1-1/+1
2017-08-04clk: sunxi-ng: h3: gate then ungate PLL CPU clk after rate changeChen-Yu Tsai1-0/+11
2017-08-02Merge branch 'clk-fixes' into clk-nextStephen Boyd1-1/+1
2017-08-01clk: sunxi-ng: Wait for lock when using fractional modeJernej Škrabec4-4/+8
2017-08-01clk: sunxi-ng: Make fractional helper less chattyJernej Škrabec1-5/+5