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path:
root
/
drivers
/
clk
/
sunxi-ng
/
ccu_mp.c
Age
Commit message (
Expand
)
Author
Files
Lines
2021-11-22
clk: sunxi-ng: Export symbols used by CCU drivers
Samuel Holland
1
-0
/
+2
2021-02-11
clk: sunxi-ng: mp: fix parent rate change flag check
Jernej Skrabec
1
-1
/
+1
2019-05-30
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152
Thomas Gleixner
1
-5
/
+1
2019-05-15
clk: Remove io.h from clk-provider.h
Stephen Boyd
1
-0
/
+1
2018-11-05
clk: sunxi-ng: Adjust MP clock parent rate when allowed
Jernej Skrabec
1
-2
/
+62
2017-12-07
clk: sunxi-ng: Support fixed post-dividers on MP style clocks
Chen-Yu Tsai
1
-2
/
+18
2017-08-30
clk: sunxi-ng: Add MP_MMC clocks that support MMC timing modes switching
Chen-Yu Tsai
1
-0
/
+80
2017-06-07
clk: sunxi-ng: mux: Change pre-divider application function prototype
Maxime Ripard
1
-4
/
+4
2017-06-07
clk: sunxi-ng: Pass the parent and a pointer to the clocks round rate
Maxime Ripard
1
-3
/
+4
2017-03-06
clk: sunxi-ng: mp: Adjust parent rate for pre-dividers
Chen-Yu Tsai
1
-0
/
+8
2017-01-23
clk: sunxi-ng: Implement factors offsets
Maxime Ripard
1
-3
/
+7
2016-09-10
clk: sunxi-ng: div: Allow to set a maximum
Maxime Ripard
1
-10
/
+13
2016-07-08
clk: sunxi-ng: Add M-P factor clock support
Maxime Ripard
1
-0
/
+158