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path: root/drivers/clk/socfpga
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2021-02-16Merge branches 'clk-socfpga', 'clk-mstar', 'clk-qcom' and 'clk-warnings' into...Stephen Boyd6-7/+240
2021-02-12clk: socfpga: agilex: add clock driver for eASIC N5X platformDinh Nguyen4-3/+238
2021-02-11clk: socfpga: clk-pll-a10: Remove set but unused variable 'rc'Lee Jones1-2/+1
2021-02-11clk: socfpga: clk-pll: Remove unused variable 'rc'Lee Jones1-2/+1
2020-10-22Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds1-13/+0
2020-09-22clk: socfpga: stratix10: fix the divider for the emac_ptp_free_clkDinh Nguyen1-1/+1
2020-09-22clk: socfpga: agilex: Remove unused variable 'cntr_mux'YueHaibing1-13/+0
2020-06-19clk: socfpga: agilex: mpu_l2ram_clk should be mpu_ccu_clkDinh Nguyen1-1/+1
2020-06-19clk: socfpga: agilex: add nand_x_clk and nand_ecc_clkDinh Nguyen1-1/+5
2020-05-26clk: socfpga: agilex: add clock driver for the Agilex platformDinh Nguyen4-0/+526
2020-05-26clk: socfpga: add const to _ops data structuresDinh Nguyen3-4/+4
2020-05-26clk: socfpga: remove clk_ops enable/disable methodsDinh Nguyen3-6/+0
2020-05-26clk: socfpga: stratix10: use new parent data schemeDinh Nguyen5-41/+146
2020-02-12clk: socfpga: stratix10: simplify parameter passingDinh Nguyen5-92/+57
2020-02-12clk: stratix10: use do_div() for 64-bit calculationDinh Nguyen1-1/+3
2019-09-20Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds2-14/+17
2019-08-16clk: socfpga: deindent code to proper indentationStephen Boyd1-2/+2
2019-08-16clk: socfpga: Don't reference clk_init_data after registrationStephen Boyd2-13/+16
2019-08-14clk: socfpga: stratix10: fix rate caclulationg for cnt_clksDinh Nguyen1-1/+1
2019-07-17Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds1-1/+5
2019-06-28Merge tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/...Linus Torvalds1-2/+2
2019-06-25clk: socfpga: stratix10: fix divider entry for the emac clocksDinh Nguyen1-2/+2
2019-06-25clk: socfpga: stratix10: add additional clocks needed for the NAND IPDinh Nguyen1-1/+5
2019-06-25clk: socfpga: stratix10: fix divider entry for the emac clocksDinh Nguyen1-2/+2
2019-06-05treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 288Thomas Gleixner1-10/+1
2019-05-30treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 201Thomas Gleixner3-36/+3
2019-05-30treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157Thomas Gleixner3-33/+3
2019-05-21treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 13Thomas Gleixner1-13/+1
2019-05-15clk: Remove io.h from clk-provider.hStephen Boyd3-0/+3
2019-03-08Merge branches 'clk-of-refcount', 'clk-mmio-fixed-clock', 'clk-remove-clps', ...Stephen Boyd3-9/+15
2019-01-24clk: socfpga: Don't have get_parent for single parent opsStephen Boyd1-9/+13
2019-01-15clk: socfpga: stratix10: fix naming convention for the fixed-clocksDinh Nguyen1-10/+10
2019-01-11clk: socfpga: stratix10: fix rate calculation for pll clocksDinh Nguyen1-1/+1
2018-12-28clk: socfpga: fix refcount leakYangtao Li2-0/+2
2018-07-06clk: socfpga: stratix10: fix the sdmmc_free_clk muxDinh Nguyen1-1/+1
2018-07-06clk: socfpga: stratix10: fix the parents of mpu_free_clkDinh Nguyen1-1/+6
2018-05-15clk: socfpga: stratix10: suppress unbinding platform's clock driverDinh Nguyen1-0/+1
2018-05-15clk: socfpga: stratix10: use platform driver APIsDinh Nguyen1-22/+17
2018-04-06clk: socfpga: stratix10: add clock driver for Stratix10 platformDinh Nguyen7-5/+853
2017-11-02License cleanup: add SPDX GPL-2.0 license identifier to files with no licenseGreg Kroah-Hartman1-0/+1
2017-06-19clk: socfpga: Fix the smplsel on Arria10 and Stratix10Dinh Nguyen2-1/+4
2016-02-22clk: socfpga: allow for multiple parents on Arria10 periph clocksDinh Nguyen2-9/+4
2016-02-08clk: socfpga: fix __init annotationArnd Bergmann1-1/+1
2015-08-24clk: socfpga: Add a second parent option for the dbg_base_clkDinh Nguyen2-4/+15
2015-07-28clk: socfpga: switch to GENMASK()Andy Shevchenko5-5/+4
2015-07-20clk: socfpga: Remove clk.h and clkdev.h includesStephen Boyd7-7/+6
2015-06-09clk: socfpga: remove a stray tabDan Carpenter1-1/+1
2015-06-05clk: socfpga: make use of of_clk_parent_fill helper functionDinh Nguyen2-11/+2
2015-05-21clk: socfpga: add a clock driver for the Arria 10 platformDinh Nguyen6-1/+469
2015-05-21clk: socfpga: update clk.h so for Arria10 platform to useDinh Nguyen2-5/+5