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path: root/drivers/clk/renesas
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2022-11-16clk: renesas: r8a779f0: Fix Ethernet Switch clocksGeert Uytterhoeven1-2/+2
2022-11-15clk: renesas: r8a779g0: Add Z0 clock supportGeert Uytterhoeven1-0/+1
2022-11-08clk: renesas: r8a779g0: Add CMT clocksWolfram Sang1-0/+4
2022-11-08clk: renesas: r8a779g0: Add TMU and SASYNCRT clocksWolfram Sang1-0/+6
2022-11-08clk: renesas: r8a779f0: Fix SCIF parent clocksWolfram Sang1-4/+4
2022-11-08clk: renesas: r8a779f0: Fix HSCIF parent clocksWolfram Sang1-4/+4
2022-11-01clk: renesas: r9a06g032: Repair grave increment errorMarek Vasut1-2/+1
2022-10-28clk: renesas: rzg2l: Don't assume all CPG_MOD clocks support PMLad Prabhakar2-15/+28
2022-10-26clk: renesas: rzg2l: Fix typo in struct rzg2l_cpg_priv kerneldocLad Prabhakar1-1/+1
2022-10-26clk: renesas: r8a779a0: Fix SD0H clock nameWolfram Sang1-1/+1
2022-10-26clk: renesas: r8a779g0: Add RPC-IF clockGeert Uytterhoeven1-1/+2
2022-10-26clk: renesas: r8a779g0: Add SDHI clocksGeert Uytterhoeven1-1/+3
2022-10-26clk: renesas: r8a779f0: Add SASYNCPER internal clockGeert Uytterhoeven1-3/+5
2022-10-26clk: renesas: r8a779f0: Fix SD0H clock nameGeert Uytterhoeven1-1/+1
2022-10-26clk: renesas: r9a07g043: Drop WDT2 clock and reset entryLad Prabhakar1-5/+0
2022-10-26clk: renesas: r9a07g044: Drop WDT2 clock and reset entryLad Prabhakar1-6/+1
2022-10-26clk: renesas: r8a779g0: Add TPU clockGeert Uytterhoeven1-0/+1
2022-10-26clk: renesas: r8a779g0: Add PWM clockGeert Uytterhoeven1-0/+1
2022-10-26clk: renesas: r8a779g0: Add SCIF clocksGeert Uytterhoeven1-0/+4
2022-10-26Merge tag 'renesas-clk-fixes-for-v6.1-tag1'Geert Uytterhoeven1-4/+9
2022-10-26clk: renesas: r8a779g0: Fix HSCIF parent clocksGeert Uytterhoeven1-4/+4
2022-10-18clk: renesas: r8a779g0: Add SASYNCPER clocksGeert Uytterhoeven1-0/+5
2022-10-17clk: renesas: r9a07g044: Add MTU3a clock and reset entryBiju Das1-1/+4
2022-10-17clk: renesas: r8a779g0: Add INTC-EX clockGeert Uytterhoeven1-0/+1
2022-10-17clk: renesas: r8a779g0: Add MSIOF clocksGeert Uytterhoeven1-0/+6
2022-10-17clk: renesas: r8a779g0: Add SYS-DMAC clocksGeert Uytterhoeven1-0/+2
2022-10-17clk: renesas: r8a779f0: Add Ethernet Switch clocksYoshihiro Shimoda1-0/+2
2022-10-17clk: renesas: rzg2l: Fix typo in function nameLad Prabhakar1-3/+3
2022-10-17clk: renesas: rzg2l: Support sd clk mux round operationBiju Das1-1/+1
2022-09-18clk: renesas: r8a779g0: Add EtherAVB clocksGeert Uytterhoeven1-0/+3
2022-09-18clk: renesas: r8a779g0: Add PFC/GPIO clocksGeert Uytterhoeven1-0/+4
2022-09-18clk: renesas: r8a779g0: Add I2C clocksGeert Uytterhoeven1-0/+6
2022-09-18clk: renesas: r8a779g0: Add watchdog clockGeert Uytterhoeven1-0/+1
2022-08-29clk: renesas: r8a779f0: Add MSIOF clocksWolfram Sang1-0/+4
2022-08-29clk: renesas: r9a09g011: Add IIC clock and reset entriesPhil Edworthy1-0/+4
2022-08-22clk: renesas: r9a07g044: Add conditional compilation for r9a07g044_cpg_infoBiju Das1-0/+2
2022-08-22clk: renesas: r8a779f0: Add TMU and parent SASYNC clocksWolfram Sang1-0/+10
2022-08-15clk: renesas: r8a779f0: Add CMT clocksWolfram Sang1-0/+4
2022-08-15clk: renesas: r8a779f0: Add SDH0 clockWolfram Sang1-1/+2
2022-07-05clk: renesas: rcar-gen4: Fix initconst confusion for cpg_pll_configAndi Kleen1-1/+1
2022-07-05clk: renesas: r9a07g043: Add support for RZ/Five SoCLad Prabhakar1-0/+32
2022-06-17clk: renesas: r8a779f0: Add HSCIF clocksWolfram Sang1-0/+4
2022-06-17clk: renesas: r8a779f0: Add PCIe clocksYoshihiro Shimoda1-0/+2
2022-06-17clk: renesas: r8a779f0: Add Z0 and Z1 clock supportGeert Uytterhoeven1-0/+2
2022-06-13clk: renesas: rza1: Remove struct rz_cpgGeert Uytterhoeven1-18/+15
2022-06-13clk: renesas: r8a7779: Remove struct r8a7779_cpgGeert Uytterhoeven1-18/+9
2022-06-13clk: renesas: r8a7778: Remove struct r8a7778_cpgGeert Uytterhoeven1-22/+9
2022-06-13clk: renesas: sh73a0: Remove sh73a0_cpg.regGeert Uytterhoeven1-13/+13
2022-06-13clk: renesas: r8a7740: Remove r8a7740_cpg.regGeert Uytterhoeven1-10/+10
2022-06-13clk: renesas: r8a73a4: Remove r8a73a4_cpg.regGeert Uytterhoeven1-11/+11