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path: root/drivers/clk/renesas/r7s9210-cpg-mssr.c
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2020-09-17clk: renesas: cpg-mssr: Use enum clk_reg_layout instead of a boolean flagYoshihiro Shimoda1-1/+1
Geert suggested defining multiple register layout variants using an enum [1] to support further devices like R-Car V3U. So, use enum clk_reg_layout instead of a boolean .stbyctrl flag. No behavioral change. [1] https://lore.kernel.org/linux-renesas-soc/CAMuHMdVAgN69p9FFnQdO4iHk2CHkeNaVui2Q-FOY6_BFVjQ-Nw@mail.gmail.com/ Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/1599810232-29035-2-git-send-email-yoshihiro.shimoda.uh@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2019-12-20clk: renesas: r7s9210: Add SPIBSC clockChris Brandt1-0/+1
Add SPIBSC clock for RZ/A2. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Link: https://lore.kernel.org/r/20191206134202.18784-4-chris.brandt@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2019-04-02clk: renesas: r7s9210: Always use readl()Geert Uytterhoeven1-1/+2
On arm32, there is no reason to use the (soon deprecated) clk_readl(). Hence use the generic readl() instead. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
2018-11-29clk: renesas: Mark rza2_cpg_clk_register staticStephen Boyd1-1/+1
This is only used in this file, so mark it static to silence a sparse warning. Cc: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-11-13clk: renesas: r7s9210: Add USB clocksChris Brandt1-0/+2
Add USB clocks for RZ/A2 Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2018-11-05clk: renesas: r7s9210: Add SDHI clocksChris Brandt1-0/+5
Add SDHI clocks for RZ/A2 Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2018-09-28clk: renesas: r7s9210: Add SPI clocksChris Brandt1-0/+3
Add RSPI clocks for RZ/A2. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2018-09-26clk: renesas: r7s9210: Move table update to separate functionChris Brandt1-45/+50
Same functionality, just easier to read. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2018-09-26clk: renesas: r7s9210: Convert some clocks to earlyChris Brandt1-6/+26
The OSTM timer driver for RZ/A2 uses TIMER_OF_DECLARE which requires the ostm module clocks to be registers early in boot. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2018-09-11clk: renesas: cpg-mssr: Add R7S9210 supportChris Brandt1-0/+189
Add support for the R7S9210 (RZ/A2) Clock Pulse Generator and Module Standby. The Module Standby HW in the RZ/A series is very close to R-Car HW, except for how the registers are laid out. The MSTP registers are only 8-bits wide, there are no status registers (MSTPSR), and the register offsets are a little different. Since the RZ/A hardware manuals refer to these registers as the Standby Control Registers, we'll use that name to distinguish the RZ/A type from the R-Car type. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Acked-by: Rob Herring <robh@kernel.org> # DT bits Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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