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path: root/drivers/clk/meson
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2017-08-01clk: meson: mpll: fix mpll0 fractional part ignoredJerome Brunet4-0/+18
2017-06-16Merge tag 'meson-clk-for-4.13-2' of git://github.com/BayLibre/clk-meson into ...Stephen Boyd4-19/+25
2017-06-16clk: meson: gxbb: add all clk81 parentsJerome Brunet1-5/+8
2017-06-16Merge branch 'next/headers' into next/driversJerome Brunet1-10/+10
2017-06-12clk: meson: meson8b: add compatibles for Meson8 and Meson8m2Martin Blumenstingl2-4/+7
2017-06-12clk: meson8b: export the ethernet gate clockMartin Blumenstingl1-1/+1
2017-06-12clk: meson8b: export the USB clocksMartin Blumenstingl1-5/+5
2017-06-12clk: meson8b: export the gate clock for the HW random number generatorMartin Blumenstingl1-1/+1
2017-06-12clk: meson8b: export the SDIO clockMartin Blumenstingl1-1/+1
2017-06-12clk: meson8b: export the SAR ADC clocksMartin Blumenstingl1-2/+2
2017-06-02clk: meson-gxbb: Add const to some parent name arraysStephen Boyd1-3/+3
2017-06-02Merge tag 'meson-clk-for-4.13' of git://github.com/BayLibre/clk-meson into cl...Stephen Boyd3-74/+73
2017-05-29clk: meson-gxbb: Add EE 32K Clock for CECNeil Armstrong2-1/+58
2017-05-29clk: gxbb: remove CLK_IGNORE_UNUSED from clk81Jerome Brunet1-1/+1
2017-05-29clk: meson: meson8b: mark clk81 as criticalMartin Blumenstingl1-1/+1
2017-05-29clk: meson: gxbb: remove the "cpu_clk" from the GXBB and GXL driverMartin Blumenstingl2-62/+4
2017-05-29clk: meson-gxbb: un-export the CPU clockMartin Blumenstingl1-1/+1
2017-05-29clk: meson-gxbb: expose UART clocksHelmut Klein1-3/+3
2017-05-29clk: meson-gxbb: expose SPICC gateNeil Armstrong1-1/+1
2017-05-29clk: meson-gxbb: expose spdif master clockJerome Brunet1-2/+2
2017-05-29clk: meson-gxbb: expose i2s master clockJerome Brunet1-1/+1
2017-05-29clk: meson-gxbb: expose spdif clock gatesJerome Brunet1-2/+2
2017-05-16clk: meson: gxbb: fix build error without RESET_CONTROLLERTobias Regnery1-0/+1
2017-05-10Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds9-49/+1150
2017-05-09Merge tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/...Linus Torvalds1-7/+14
2017-04-07clk: meson: mpll: use 64bit math in rate_from_paramsMartin Blumenstingl1-1/+1
2017-04-07clk: meson: mpll: fix division by zero in rate_from_paramsMartin Blumenstingl1-11/+15
2017-04-07clk: meson: gxbb: add cts_i958 clockJerome Brunet2-1/+23
2017-04-07clk: meson: gxbb: add cts_mclk_i958Jerome Brunet2-1/+56
2017-04-07clk: meson: gxbb: add cts_amclkJerome Brunet2-1/+71
2017-04-07clk: meson: add audio clock divider supportJerome Brunet3-1/+155
2017-04-07clk: meson: gxbb: protect against holes in the onecell_data arrayJerome Brunet1-0/+4
2017-04-04Merge branch 'v4.12/clk-drivers' into v4.12/clkKevin Hilman7-48/+840
2017-04-04clk: meson-gxbb: Add GXL/GXM GP0 VariantNeil Armstrong2-28/+275
2017-04-04clk: meson-gxbb: Add GP0 PLL init parametersNeil Armstrong1-0/+13
2017-04-04clk: meson: Add support for parameters for specific PLLsNeil Armstrong2-2/+74
2017-04-04clk: meson-gxbb: Add MALI clocksNeil Armstrong1-0/+139
2017-04-04clk: meson-gxbb: Expose GP0 dt-bindings clock idNeil Armstrong1-1/+1
2017-04-04clk: meson-gxbb: Add MALI clock IDSNeil Armstrong1-1/+8
2017-04-04dt-bindings: clk: gxbb: expose i2s output clock gatesJerome Brunet1-5/+5
2017-03-27clk: meson: mpll: correct N2 maximum valueJerome Brunet1-1/+1
2017-03-27clk: meson8b: add the mplls clocks 0, 1 and 2Jerome Brunet2-1/+122
2017-03-27clk: meson: gxbb: mpll: use rw operationJerome Brunet1-3/+3
2017-03-27clk: meson: mpll: add rw operationJerome Brunet3-6/+180
2017-03-27clk: gxbb: put dividers and muxes in tablesJerome Brunet1-8/+20
2017-03-27clk: meson8b: put dividers and muxes in tablesJerome Brunet1-4/+18
2017-03-27clk: meson: add missing const qualifiers on gate arraysJerome Brunet2-2/+2
2017-03-27clk: meson: fix SET_PARM macroJerome Brunet1-1/+1
2017-03-16clk: meson-gxbb: expose clock CLKID_RNG0Heiner Kallweit1-1/+1
2017-03-03Merge tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/...Linus Torvalds2-6/+57