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path: root/drivers/clk/meson
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2018-03-14clk: meson: Drop unused local variable and add staticStephen Boyd3-11/+10
2018-03-13clk: meson: clean-up clk81 clocksJerome Brunet2-8/+4
2018-03-13clk: meson: add fdiv clock gatesJerome Brunet6-33/+278
2018-03-13clk: meson: add mpll pre-dividerJerome Brunet6-13/+65
2018-03-13clk: meson: axg: add hifi pll clockJerome Brunet2-1/+56
2018-03-13clk: meson: add ROUND_CLOSEST to the pll driverJerome Brunet2-4/+15
2018-03-13clk: meson: add gp0 frac parameter for axg and gxlJerome Brunet2-2/+12
2018-03-13clk: meson: improve pll driver results with fracJerome Brunet2-59/+91
2018-03-13clk: meson: remove special gp0 lock loopJerome Brunet4-15/+1
2018-03-13clk: meson: poke pll CNTL lastJerome Brunet2-3/+3
2018-03-13clk: meson: add fractional part of meson8b fixed_pllJerome Brunet1-0/+5
2018-03-13clk: meson: use hhi syscon if availableJerome Brunet3-24/+60
2018-03-13clk: meson: remove obsolete cpu_clkJerome Brunet3-190/+1
2018-03-13clk: meson: rework meson8b cpu clockJerome Brunet2-61/+119
2018-03-13clk: meson: split divider and gate part of mpllJerome Brunet8-118/+197
2018-03-13clk: meson: migrate plls clocks to clk_regmapJerome Brunet5-530/+535
2018-03-13clk: meson: migrate the audio divider clock to clk_regmapJerome Brunet3-68/+30
2018-03-13clk: meson: migrate mplls clocks to clk_regmapJerome Brunet5-354/+313
2018-03-13clk: meson: add regmap helpers for parmJerome Brunet1-0/+16
2018-03-13clk: meson: migrate muxes to clk_regmapJerome Brunet3-213/+184
2018-03-13clk: meson: migrate dividers to clk_regmapJerome Brunet3-159/+142
2018-03-13clk: meson: migrate gates to clk_regmapJerome Brunet5-195/+206
2018-03-13clk: meson: add regmap to the clock controllersJerome Brunet4-12/+52
2018-03-13clk: meson: remove superseded aoclk_gate_regmapJerome Brunet2-56/+0
2018-03-13clk: meson: switch gxbb ao_clk to clk_regmapJerome Brunet4-12/+12
2018-03-13clk: meson: add regmap clocksJerome Brunet4-0/+282
2018-03-13clk: meson: remove obsolete commentsJerome Brunet3-12/+0
2018-03-13clk: meson: only one loop index is necessary in probeJerome Brunet3-15/+14
2018-03-13clk: meson: use devm_of_clk_add_hw_providerJerome Brunet3-6/+7
2018-03-13clk: meson: use dev pointer where possibleJerome Brunet2-5/+5
2018-02-12clk: meson: add axg misc bit to the mpll driverJerome Brunet3-0/+28
2018-02-12clk: meson: axg: fix the od shift of the sys_pllYixun Lan1-1/+1
2018-02-12clk: meson: axg: add the fractional part of the fixed_pllJerome Brunet1-0/+5
2018-02-12clk: meson: gxbb: add the fractional part of the fixed_pllJerome Brunet1-0/+5
2018-02-12clk: meson: fix rate calculation of plls with a fractional partJerome Brunet3-3/+15
2018-02-12clk: meson: add the gxl hdmi pllJerome Brunet1-2/+48
2018-02-12clk: meson: add od3 to the pll driverJerome Brunet3-3/+23
2018-02-12clk: meson: use the frac parameter width instead of a constantJerome Brunet1-1/+1
2018-02-12clk: meson: remove unnecessary rounding in the pll clockJerome Brunet1-8/+9
2018-02-12clk: meson: remove useless pll rate params tablesJerome Brunet2-188/+0
2018-02-12clk: meson: check pll rate param table before using itJerome Brunet1-0/+10
2018-01-10clk: meson-axg: fix potential NULL dereference in axg_clkc_probe()weiyongjun (A)1-0/+2
2018-01-02Merge tag 'meson-clk-for-v4.16-3' of git://github.com/BayLibre/clk-meson into...Stephen Boyd1-1/+1
2017-12-28clk: meson-axg: make local symbol axg_gp0_params_table staticweiyongjun (A)1-1/+1
2017-12-28clk: meson-axg: fix return value check in axg_clkc_probe()weiyongjun (A)1-1/+1
2017-12-23clk: meson: mpll: use 64-bit maths in params_from_rateMartin Blumenstingl1-1/+1
2017-12-14clk: meson-axg: add clock controller driversQiufang Dai4-0/+1071
2017-12-14clk: meson: make the spinlock naming more specificYixun Lan3-69/+69
2017-12-08clk: meson: gxbb: remove IGNORE_UNUSED from mmc clocksJerome Brunet1-13/+3
2017-11-27clk: meson: gxbb: fix wrong clock for SARADC/SANAYixun Lan1-2/+2