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path: root/drivers/clk/mediatek/clk-mt2701-hif.c
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2022-06-15clk: mediatek: reset: Add new register reset function with deviceRex-BC Chen1-1/+1
2022-06-15clk: mediatek: reset: Support nonsequence base offsets of reset registersRex-BC Chen1-2/+4
2022-06-15clk: mediatek: reset: Revise structure to control reset registerRex-BC Chen1-1/+7
2022-06-15clk: mediatek: reset: Merge and revise reset register functionRex-BC Chen1-1/+1
2022-05-19clk: mediatek: Replace 'struct clk' with 'struct clk_hw'Chen-Yu Tsai1-2/+2
2019-05-30treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174Thomas Gleixner1-9/+1
2016-11-08reset: mediatek: Add MT2701 reset driverShunli Wang1-2/+6
2016-11-08clk: mediatek: Add MT2701 clock supportShunli Wang1-0/+77