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path: root/drivers/clk/hisilicon/clk-hi3660.c
AgeCommit message (Expand)AuthorFilesLines
2019-10-03clk: hisilicon: fix sparse warnings in clk-hi3660.cBen Dooks1-30/+30
2019-05-30treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152Thomas Gleixner1-5/+1
2019-04-19clk: hi3660: Mark clk_gate_ufs_subsys as criticalLeo Yan1-1/+5
2017-11-14clk: hi3660: fix incorrect uart3 clock freqencyZhong Kaihua1-1/+1
2017-06-19clk: hi3660: Set PPLL2 to 2880MZhong Kaihua1-2/+2
2017-06-19clk: hi3660: add clocks for video encoder, decoder and ISPChen Jun1-0/+40
2017-06-19clk: hi3660: fix wrong parent name of clk_mux_sysbusChen Jun1-2/+4
2017-06-19clk: Hi3660: register fixed_rate_clks with CLK_OF_DECLARE_DRIVERLeo Yan1-10/+38
2017-01-09clk: hisilicon: Add clock driver for hi3660 SoCZhangfei Gao1-0/+567