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path: root/drivers/clk/actions
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2020-07-21clk: actions: Add Actions S500 SoC Reset Management Unit supportCristian Ciocaltea1-0/+78
2020-07-21clk: actions: Add APB, DMAC, GPIO clock support for Actions S500 SoCCristian Ciocaltea1-0/+9
2020-07-21clk: actions: Fix h_clk for Actions S500 SoCCristian Ciocaltea1-1/+1
2019-09-19Merge branches 'clk-cdce-regulator', 'clk-bcm', 'clk-evict-parent-cache' and ...Stephen Boyd1-4/+3
2019-09-17clk: actions: Fix factor clk struct member accessManivannan Sadhasivam1-4/+3
2019-08-16clk: actions: Don't reference clk_init_data after registrationStephen Boyd1-2/+3
2019-05-21treewide: Add SPDX license identifier - Makefile/KconfigThomas Gleixner2-0/+2
2019-05-01clk: actions: Use the correct style for SPDX License IdentifierNishad Kamdar9-9/+9
2019-02-22clk: actions: Add clock driver for S500 SoCManivannan Sadhasivam3-0/+531
2019-02-21clk: actions: Add configurable PLL delayManivannan Sadhasivam2-7/+25
2018-10-16clk: actions: Add Actions Semi S900 SoC Reset Management Unit supportManivannan Sadhasivam1-0/+82
2018-10-16clk: actions: Add Actions Semi S700 SoC Reset Management Unit supportManivannan Sadhasivam1-0/+51
2018-10-16clk: actions: Add Actions Semi Owl SoCs Reset Management Unit supportManivannan Sadhasivam5-0/+101
2018-10-16clk: actions: Cache regmap info in private clock descriptorManivannan Sadhasivam4-6/+8
2018-07-25clk: actions: Add S700 SoC clock supportSaravanan Sekar3-0/+613
2018-07-25clk: actions: Add missing REGMAP_MMIO dependencySaravanan Sekar1-0/+1
2018-04-06clk: actions: Add S900 SoC clock supportManivannan Sadhasivam3-0/+734
2018-04-06clk: actions: Add pll clock supportManivannan Sadhasivam3-0/+287
2018-04-06clk: actions: Add composite clock supportManivannan Sadhasivam3-0/+324
2018-04-06clk: actions: Add fixed factor clock supportManivannan Sadhasivam1-0/+28
2018-04-06clk: actions: Add factor clock supportManivannan Sadhasivam3-0/+306
2018-04-06clk: actions: Add divider clock supportManivannan Sadhasivam3-0/+170
2018-04-06clk: actions: Add mux clock supportManivannan Sadhasivam3-0/+122
2018-04-06clk: actions: Add gate clock supportManivannan Sadhasivam3-0/+151
2018-04-06clk: actions: Add common clock driver supportManivannan Sadhasivam4-0/+137