summaryrefslogtreecommitdiffstats
path: root/drivers/char/agp/intel-agp.h
AgeCommit message (Expand)AuthorFilesLines
2014-01-07agp/intel: Use pci_bus_address() to get GTTADR bus addressBjorn Helgaas1-1/+1
2014-01-07agp/intel: Use pci_bus_address() to get MMADR bus addressBjorn Helgaas1-2/+2
2014-01-07agp/intel: Support 64-bit GMADRYinghai Lu1-2/+2
2012-11-11drm/i915: Kill off now unused gen6+ AGP codeBen Widawsky1-91/+0
2012-08-17drm/i915: fix hsw uncached pteDaniel Vetter1-0/+1
2012-08-07drm/i915: add more Haswell PCI IDsPaulo Zanoni1-5/+34
2012-06-25Merge tag 'v3.5-rc4' into drm-intel-next-queuedDaniel Vetter1-0/+1
2012-06-12drm/i915 + agp/intel-gtt: prep work for direct setupDaniel Vetter1-3/+0
2012-06-06char/agp: add another Ironlake host bridgeEugeni Dodonov1-0/+1
2012-04-12Merge branch 'drm-intel-next' of git://people.freedesktop.org/~danvet/drm-int...Dave Airlie1-0/+14
2012-04-09drm/i915: add Haswell devices and their PCI IDsEugeni Dodonov1-0/+11
2012-04-02drm/i915: add Ivy Bridge GT2 Server entriesEugeni Dodonov1-0/+1
2012-03-29agp/intel: add ValleyView AGP driverJesse Barnes1-0/+3
2011-07-13agp/intel: Fix typo in G4x_GMCH_SIZE_VT_2MChris Wilson1-3/+4
2011-05-13agp/intel: add Ivy Bridge supportJesse Barnes1-0/+8
2011-02-22agp/intel: Experiment with a 855GM GWB bitChris Wilson1-0/+1
2011-01-11agp/intel: Flush the chipset write buffers when changing GTT baseChris Wilson1-0/+2
2010-10-27intel-gtt: maximize ggtt size on platforms that support thisDaniel Vetter1-3/+11
2010-09-21Merge branch 'drm-intel-fixes' into HEADChris Wilson1-0/+2
2010-09-17drm/i915,agp/intel: Add second set of PCI-IDs for B43Chris Wilson1-0/+2
2010-09-08intel-gtt: introduce intel_gtt_driverDaniel Vetter1-40/+0
2010-09-08agp/intel: make intel-gtt.c into a real source fileDaniel Vetter1-0/+3
2010-09-07intel_agp,i915: Add more sandybridge graphics device idsZhenyu Wang1-6/+12
2010-09-07agp/intel: use #ifdef idiom for intel-agp.hZhenyu Wang1-0/+4
2010-08-21drm/i915,intel_agp: Add support for Sandybridge D0Zhenyu Wang1-0/+1
2010-08-01agp/intel: Add actual definitions of the Sandybridge PTE caching bits.Zhenyu Wang1-0/+6
2010-04-18agp/intel: introduce intel-agp.h header fileDaniel Vetter1-0/+239
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-16 11:46:25 +0000