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path: root/arch/x86/include/asm/idtentry.h
AgeCommit message (Expand)AuthorFilesLines
2020-11-04x86/entry: Move nmi entry/exit into common codeThomas Gleixner1-3/+0
2020-10-14Merge tag 'x86_seves_for_v5.10' of git://git.kernel.org/pub/scm/linux/kernel/...Linus Torvalds1-0/+50
2020-10-12Merge tag 'x86-paravirt-2020-10-12' of git://git.kernel.org/pub/scm/linux/ker...Linus Torvalds1-2/+2
2020-10-07x86/platform/uv: Remove UV BAU TLB Shootdown HandlerMike Travis1-4/+0
2020-09-22x86/irq: Make run_on_irqstack_cond() typesafeThomas Gleixner1-1/+1
2020-09-09x86/sev-es: Add a Runtime #VC Exception HandlerTom Lendacky1-0/+6
2020-09-09x86/entry/64: Add entry code for #VC handlerJoerg Roedel1-0/+44
2020-08-15x86/entry/32: Simplify CONFIG_XEN_PV build dependencyJuergen Gross1-2/+2
2020-08-06Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvmLinus Torvalds1-0/+4
2020-07-26Merge branch 'locking/nmi' into x86/entryIngo Molnar1-0/+3
2020-07-24x86/entry: Cleanup idtentry_enter/exitThomas Gleixner1-19/+14
2020-07-24x86/entry: Use generic interrupt entry/exit codeThomas Gleixner1-6/+4
2020-07-24x86/entry: Cleanup idtentry_entry/exit_userThomas Gleixner1-4/+0
2020-07-24x86/entry: Use generic syscall exit functionalityThomas Gleixner1-2/+1
2020-07-24x86/entry: Use generic syscall entry functionThomas Gleixner1-1/+4
2020-07-24Merge branch 'core/entry' into x86/entryThomas Gleixner1-10/+8
2020-07-16x86/entry: Fix vectors to IDTENTRY_SYSVEC for CONFIG_HYPERVSedat Dilek1-2/+2
2020-07-16x86/entry: Add compatibility with IASJian Cai1-8/+6
2020-07-16x86/idtentry: Remove stale commentThomas Gleixner1-4/+2
2020-07-10x86/entry: Fix NMI vs IRQ state trackingPeter Zijlstra1-0/+3
2020-07-10Merge branch 'x86/urgent' into x86/entry to pick up upstream fixes.Thomas Gleixner1-2/+2
2020-07-08Merge branch 'kvm-async-pf-int' into HEADPaolo Bonzini1-0/+4
2020-07-06x86/entry: Rename idtentry_enter/exit_cond_rcu() to idtentry_enter/exit()Andy Lutomirski1-12/+16
2020-07-05x86/entry/32: Fix XEN_PV build dependencyIngo Molnar1-2/+2
2020-07-04x86/entry/32: Fix #MC and #DB wiring on x86_32Andy Lutomirski1-10/+13
2020-07-04x86/entry/xen: Route #DB correctly on Xen PVAndy Lutomirski1-18/+6
2020-06-12x86/entry: Make NMI use IDTENTRY_RAWThomas Gleixner1-2/+2
2020-06-12x86/entry: Treat BUG/WARN as NMI-like entriesAndy Lutomirski1-1/+1
2020-06-11x86/entry: Clarify irq_{enter,exit}_rcu()Peter Zijlstra1-2/+0
2020-06-11x86/entry: Convert reschedule interrupt to IDTENTRY_SYSVEC_SIMPLEThomas Gleixner1-0/+1
2020-06-11x86/entry: Convert XEN hypercall vector to IDTENTRY_SYSVECThomas Gleixner1-0/+4
2020-06-11x86/entry: Convert various hypervisor vectors to IDTENTRY_SYSVECThomas Gleixner1-0/+10
2020-06-11x86/entry: Convert KVM vectors to IDTENTRY_SYSVEC*Thomas Gleixner1-0/+6
2020-06-11x86/entry: Convert various system vectorsThomas Gleixner1-0/+22
2020-06-11x86/entry: Convert SMP system vectors to IDTENTRY_SYSVECThomas Gleixner1-0/+7
2020-06-11x86/entry: Convert APIC interrupts to IDTENTRY_SYSVECThomas Gleixner1-0/+8
2020-06-11x86/entry: Provide IDTENTRY_SYSVECThomas Gleixner1-0/+79
2020-06-11x86/entry: Use idtentry for interruptsThomas Gleixner1-2/+8
2020-06-11x86/entry: Add IRQENTRY_IRQ macroThomas Gleixner1-0/+49
2020-06-11x86/irq: Convey vector as argument and not in ptregsThomas Gleixner1-0/+48
2020-06-11x86/entry: Remove the transition leftoversThomas Gleixner1-3/+3
2020-06-11x86/entry: Switch page fault exception to IDTENTRY_RAWThomas Gleixner1-1/+2
2020-06-11x86/entry: Switch XEN/PV hypercall entry to IDTENTRYThomas Gleixner1-0/+34
2020-06-11x86/entry: Clean up idtentry_enter/exit() leftoversThomas Gleixner1-11/+1
2020-06-11x86/idtentry: Switch to conditional RCU handlingThomas Gleixner1-4/+6
2020-06-11x86/entry: Provide idtentry_enter/exit_user()Thomas Gleixner1-0/+3
2020-06-11x86/entry: Provide idtentry_entry/exit_cond_rcu()Thomas Gleixner1-2/+12
2020-06-11x86/entry: Convert double fault exception to IDTENTRY_DFThomas Gleixner1-0/+3
2020-06-11x86/idtentry: Provide IDTENTRY_DFThomas Gleixner1-0/+87
2020-06-11x86/idtentry: Provide IDTRENTRY_NOIST variants for #DB and #MCThomas Gleixner1-2/+17
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