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path: root/arch/x86/events/perf_event.h
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2020-01-17perf/x86/amd: Add support for Large Increment per Cycle EventsKim Phillips1-0/+18
2020-01-17perf/x86/amd: Constrain Large Increment per Cycle eventsKim Phillips1-0/+2
2019-10-28perf/x86/intel: Implement LBR callstack context synchronizationAlexey Budankov1-0/+3
2019-10-28perf/core, perf/x86: Introduce swap_task_ctx() method at 'struct pmu'Alexey Budankov1-0/+8
2019-08-28perf/x86/intel: Support PEBS output to PTAlexander Shishkin1-0/+17
2019-07-08Merge tag 'v5.2' into perf/core, to pick up fixesIngo Molnar1-20/+1
2019-06-24perf/x86: Remove pmu->pebs_no_xmm_regsKan Liang1-2/+1
2019-06-24perf/x86: Clean up PEBS_XMM_REGSKan Liang1-18/+0
2019-06-03perf/x86: Use update attribute groups for default attributesJiri Olsa1-3/+0
2019-06-03perf/x86: Use update attribute groups for capsJiri Olsa1-1/+0
2019-06-03perf/x86: Use the new pmu::update_attrs attribute groupJiri Olsa1-1/+1
2019-06-03perf/x86: Get rid of x86_pmu::event_attrsJiri Olsa1-1/+0
2019-05-10perf/x86/intel: Fix INTEL_FLAGS_EVENT_CONSTRAINT* maskingStephane Eranian1-2/+2
2019-04-16perf/x86/intel: Add Icelake supportKan Liang1-0/+2
2019-04-16perf/x86: Support constraint rangesPeter Zijlstra1-6/+37
2019-04-16perf/x86/lbr: Avoid reading the LBRs when adaptive PEBS handles themAndi Kleen1-0/+1
2019-04-16perf/x86/intel: Support adaptive PEBS v4Kan Liang1-1/+10
2019-04-16perf/x86: Support outputting XMM registersKan Liang1-1/+20
2019-04-16perf/x86/intel: Force resched when TFA sysctl is modifiedStephane Eranian1-0/+1
2019-04-16Merge branch 'perf/urgent' into perf/core, to pick up fixesIngo Molnar1-19/+19
2019-04-16perf/x86: Fix incorrect PEBS_REGSKan Liang1-19/+19
2019-04-03perf/x86: Remove PERF_X86_EVENT_COMMITTEDPeter Zijlstra1-10/+9
2019-03-15perf/x86: Fixup typo in stub functionsPeter Zijlstra1-2/+2
2019-03-12Merge branch 'x86-tsx-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...Linus Torvalds1-3/+14
2019-03-06perf/x86/intel: Implement support for TSX Force AbortPeter Zijlstra (Intel)1-0/+6
2019-03-06perf/x86/intel: Make cpuc allocations consistentPeter Zijlstra (Intel)1-3/+8
2019-02-28Merge branch 'linus' into perf/core, to pick up fixesIngo Molnar1-2/+14
2019-02-11perf/x86: Add check_period PMU callbackJiri Olsa1-2/+14
2019-02-11perf/x86/kvm: Avoid unnecessary work in guest filteringAndi Kleen1-7/+8
2018-11-22perf/x86/intel: Add generic branch tracing check to intel_pmu_has_bts()Jiri Olsa1-4/+9
2018-10-02perf/x86/intel: Add a separate Arch Perfmon v4 PMI handlerAndi Kleen1-1/+3
2018-07-25perf/x86/intel: Introduce PMU flag for Extended PEBSKan Liang1-0/+1
2018-06-21perf/x86/intel/lbr: Optimize context switches for the LBR call stackKan Liang1-0/+4
2018-06-21perf/x86/intel/lbr: Fix incomplete LBR call stackKan Liang1-0/+1
2018-03-24Merge branch 'perf/urgent' into perf/core, to pick up fixesIngo Molnar1-3/+3
2018-03-20perf/x86/intel: Rename confusing 'freerunning PEBS' API and implementation to...Kan Liang1-3/+3
2018-03-09perf/x86/intel/ds: Introduce ->read() function for auto-reload events and flu...Kan Liang1-0/+2
2018-03-09perf/x86: Introduce a ->read() callback in 'struct x86_pmu'Kan Liang1-0/+1
2018-03-09perf/x86/intel: Fix large period handling on Broadwell CPUsKan Liang1-1/+1
2018-02-05x86/events/intel/ds: Add PERF_SAMPLE_PERIOD into PEBS_FREERUNNING_FLAGSJiri Olsa1-1/+2
2017-12-23x86/events/intel/ds: Map debug buffers in cpu_entry_areaHugh Dickins1-0/+2
2017-12-23x86/cpu_entry_area: Add debugstore entries to cpu_entry_areaThomas Gleixner1-19/+2
2017-12-17perf/x86: Enable free running PEBS for REGS_USER/INTRAndi Kleen1-1/+23
2017-08-29perf/core, x86: Add PERF_SAMPLE_PHYS_ADDRKan Liang1-1/+1
2017-08-25perf/x86: Export some PMU attributes in caps/ directoryAndi Kleen1-0/+3
2017-08-25perf/x86: Fix data source decoding for SkylakeAndi Kleen1-0/+2
2017-08-25perf/x86: Move Nehalem PEBS code to flagAndi Kleen1-1/+2
2017-07-18perf/x86/intel: Add Goldmont Plus CPU PMU supportKan Liang1-0/+2
2017-05-23perf/x86: Add sysfs entry to freeze counters on SMIKan Liang1-0/+3
2017-04-14perf/x86: Fix spurious NMI with PEBS Load Latency eventKan Liang1-0/+1
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