Age | Commit message (Expand) | Author | Files | Lines |
2021-05-01 | Merge tag 'iommu-updates-v5.13' of git://git.kernel.org/pub/scm/linux/kernel/... | Linus Torvalds | 2 | -19/+1 |
2021-04-28 | Merge tag 'perf-core-2021-04-28' of git://git.kernel.org/pub/scm/linux/kernel... | Linus Torvalds | 2 | -6/+6 |
2021-04-16 | perf/amd/uncore: Fix sysfs type mismatch | Nathan Chancellor | 1 | -3/+3 |
2021-04-16 | x86/events/amd/iommu: Fix sysfs type mismatch | Nathan Chancellor | 1 | -3/+3 |
2021-04-07 | iommu/amd: Move a few prototypes to include/linux/amd-iommu.h | Christoph Hellwig | 2 | -19/+1 |
2021-03-18 | x86: Fix various typos in comments | Ingo Molnar | 2 | -2/+2 |
2020-11-19 | x86/CPU/AMD: Remove amd_get_nb_id() | Yazen Ghannam | 1 | -1/+1 |
2020-10-03 | x86/events/amd/iommu: Fix sizeof mismatch | Colin Ian King | 1 | -1/+1 |
2020-09-24 | perf/amd/uncore: Inform the user how many counters each uncore PMU has | Kim Phillips | 1 | -6/+7 |
2020-09-24 | perf/amd/uncore: Allow F19h user coreid, threadmask, and sliceid specification | Kim Phillips | 1 | -5/+32 |
2020-09-24 | perf/amd/uncore: Allow F17h user threadmask and slicemask specification | Kim Phillips | 1 | -7/+16 |
2020-09-24 | perf/amd/uncore: Prepare to scale for more attributes that vary per family | Kim Phillips | 1 | -50/+61 |
2020-09-10 | arch/x86/amd/ibs: Fix re-arming IBS Fetch | Kim Phillips | 1 | -1/+14 |
2020-09-10 | perf/x86/amd/ibs: Support 27-bit extended Op/cycle counter | Kim Phillips | 1 | -11/+31 |
2020-09-10 | perf/x86/amd/ibs: Fix raw sample data accumulation | Kim Phillips | 1 | -10/+16 |
2020-09-10 | perf/x86/amd/ibs: Don't include randomized bits in get_ibs_op_count() | Kim Phillips | 1 | -4/+8 |
2020-09-10 | perf/amd/uncore: Set all slices and threads to restore perf stat -a behaviour | Kim Phillips | 1 | -20/+8 |
2020-06-15 | x86/msr: Lift AMD family 0x15 power-specific MSRs | Borislav Petkov | 1 | -4/+0 |
2020-03-25 | Merge branch 'x86/cpu' into perf/core, to resolve conflict | Ingo Molnar | 1 | -1/+1 |
2020-03-24 | x86/perf/events: Convert to new CPU match macros | Thomas Gleixner | 1 | -1/+1 |
2020-03-19 | Merge branch 'perf/urgent' into perf/core, to pick up fixes | Ingo Molnar | 1 | -10/+7 |
2020-03-17 | perf/amd/uncore: Add support for Family 19h L3 PMU | Kim Phillips | 1 | -6/+14 |
2020-03-17 | perf/amd/uncore: Make L3 thread mask code more readable | Kim Phillips | 1 | -5/+8 |
2020-03-17 | perf/amd/uncore: Prepare L3 thread mask code for Family 19h | Kim Phillips | 1 | -9/+16 |
2020-03-12 | perf/amd/uncore: Replace manual sampling check with CAP_NO_INTERRUPT flag | Kim Phillips | 1 | -10/+7 |
2020-02-11 | perf/x86/amd: Add missing L2 misses event spec to AMD Family 17h's event map | Kim Phillips | 1 | -0/+1 |
2020-01-17 | perf/x86/amd: Add support for Large Increment per Cycle Events | Kim Phillips | 1 | -0/+18 |
2020-01-17 | perf/x86/amd: Constrain Large Increment per Cycle events | Kim Phillips | 1 | -30/+61 |
2019-11-11 | perf/x86/amd: Remove set but not used variable 'active' | Zheng Yongjun | 1 | -11/+2 |
2019-10-28 | perf/x86/amd/ibs: Handle erratum #420 only on the affected CPU family (10h) | Kim Phillips | 1 | -2/+4 |
2019-10-28 | perf/x86/amd/ibs: Fix reading of the IBS OpData register and thus precise RIP... | Kim Phillips | 1 | -1/+1 |
2019-10-09 | perf/x86/amd: Change/fix NMI latency mitigation to use a timestamp | Tom Lendacky | 1 | -13/+17 |
2019-08-30 | perf/x86/amd/ibs: Fix sample bias for dispatched micro-ops | Kim Phillips | 1 | -3/+10 |
2019-07-13 | perf/x86/amd/uncore: Set the thread mask for F17h L3 PMCs | Kim Phillips | 1 | -4/+11 |
2019-07-13 | perf/x86/amd/uncore: Do not set 'ThreadMask' and 'SliceMask' for non-L3 PMCs | Kim Phillips | 1 | -1/+1 |
2019-06-19 | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 | Thomas Gleixner | 4 | -16/+4 |
2019-05-21 | treewide: Add SPDX license identifier for missed files | Thomas Gleixner | 1 | -0/+1 |
2019-05-08 | perf/x86/amd/iommu: Make the 'amd_iommu_attr_groups' symbol static | Wang Hai | 1 | -1/+1 |
2019-05-02 | perf/x86/amd: Update generic hardware cache events for Family 17h | Kim Phillips | 1 | -3/+108 |
2019-04-18 | perf/x86/amd: Add event map for AMD Family 17h | Kim Phillips | 1 | -9/+26 |
2019-04-10 | x86/perf/amd: Remove need to check "running" bit in NMI handler | Lendacky, Thomas | 1 | -2/+19 |
2019-04-03 | x86/perf/amd: Resolve NMI latency issues for active PMCs | Lendacky, Thomas | 1 | -1/+55 |
2019-04-03 | x86/perf/amd: Resolve race condition when disabling PMC | Lendacky, Thomas | 1 | -3/+62 |
2019-01-21 | perf/core, arch/x86: Strengthen exclusion checks with PERF_PMU_CAP_NO_EXCLUDE | Andrew Murray | 2 | -10/+3 |
2019-01-21 | perf/core, arch/x86: Use PERF_PMU_CAP_NO_EXCLUDE for exclusion incapable PMUs | Andrew Murray | 2 | -20/+3 |
2018-10-23 | Merge branch 'x86-cpu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel... | Linus Torvalds | 2 | -7/+17 |
2018-10-02 | perf/x86/amd/uncore: Set ThreadMask and SliceMask for L3 Cache perf events | Natarajan, Janakarajan | 1 | -0/+10 |
2018-09-27 | x86/events: Add Hygon Dhyana support to PMU infrastructure | Pu Wen | 2 | -7/+17 |
2018-07-24 | perf/x86/amd/ibs: Don't access non-started event | Thomas Gleixner | 1 | -1/+5 |
2018-06-12 | treewide: kzalloc() -> kcalloc() | Kees Cook | 1 | -1/+1 |