summaryrefslogtreecommitdiffstats
path: root/arch/x86/events/amd
AgeCommit message (Expand)AuthorFilesLines
2021-05-01Merge tag 'iommu-updates-v5.13' of git://git.kernel.org/pub/scm/linux/kernel/...Linus Torvalds2-19/+1
2021-04-28Merge tag 'perf-core-2021-04-28' of git://git.kernel.org/pub/scm/linux/kernel...Linus Torvalds2-6/+6
2021-04-16perf/amd/uncore: Fix sysfs type mismatchNathan Chancellor1-3/+3
2021-04-16x86/events/amd/iommu: Fix sysfs type mismatchNathan Chancellor1-3/+3
2021-04-07iommu/amd: Move a few prototypes to include/linux/amd-iommu.hChristoph Hellwig2-19/+1
2021-03-18x86: Fix various typos in commentsIngo Molnar2-2/+2
2020-11-19x86/CPU/AMD: Remove amd_get_nb_id()Yazen Ghannam1-1/+1
2020-10-03x86/events/amd/iommu: Fix sizeof mismatchColin Ian King1-1/+1
2020-09-24perf/amd/uncore: Inform the user how many counters each uncore PMU hasKim Phillips1-6/+7
2020-09-24perf/amd/uncore: Allow F19h user coreid, threadmask, and sliceid specificationKim Phillips1-5/+32
2020-09-24perf/amd/uncore: Allow F17h user threadmask and slicemask specificationKim Phillips1-7/+16
2020-09-24perf/amd/uncore: Prepare to scale for more attributes that vary per familyKim Phillips1-50/+61
2020-09-10arch/x86/amd/ibs: Fix re-arming IBS FetchKim Phillips1-1/+14
2020-09-10perf/x86/amd/ibs: Support 27-bit extended Op/cycle counterKim Phillips1-11/+31
2020-09-10perf/x86/amd/ibs: Fix raw sample data accumulationKim Phillips1-10/+16
2020-09-10perf/x86/amd/ibs: Don't include randomized bits in get_ibs_op_count()Kim Phillips1-4/+8
2020-09-10perf/amd/uncore: Set all slices and threads to restore perf stat -a behaviourKim Phillips1-20/+8
2020-06-15x86/msr: Lift AMD family 0x15 power-specific MSRsBorislav Petkov1-4/+0
2020-03-25Merge branch 'x86/cpu' into perf/core, to resolve conflictIngo Molnar1-1/+1
2020-03-24x86/perf/events: Convert to new CPU match macrosThomas Gleixner1-1/+1
2020-03-19Merge branch 'perf/urgent' into perf/core, to pick up fixesIngo Molnar1-10/+7
2020-03-17perf/amd/uncore: Add support for Family 19h L3 PMUKim Phillips1-6/+14
2020-03-17perf/amd/uncore: Make L3 thread mask code more readableKim Phillips1-5/+8
2020-03-17perf/amd/uncore: Prepare L3 thread mask code for Family 19hKim Phillips1-9/+16
2020-03-12perf/amd/uncore: Replace manual sampling check with CAP_NO_INTERRUPT flagKim Phillips1-10/+7
2020-02-11perf/x86/amd: Add missing L2 misses event spec to AMD Family 17h's event mapKim Phillips1-0/+1
2020-01-17perf/x86/amd: Add support for Large Increment per Cycle EventsKim Phillips1-0/+18
2020-01-17perf/x86/amd: Constrain Large Increment per Cycle eventsKim Phillips1-30/+61
2019-11-11perf/x86/amd: Remove set but not used variable 'active'Zheng Yongjun1-11/+2
2019-10-28perf/x86/amd/ibs: Handle erratum #420 only on the affected CPU family (10h)Kim Phillips1-2/+4
2019-10-28perf/x86/amd/ibs: Fix reading of the IBS OpData register and thus precise RIP...Kim Phillips1-1/+1
2019-10-09perf/x86/amd: Change/fix NMI latency mitigation to use a timestampTom Lendacky1-13/+17
2019-08-30perf/x86/amd/ibs: Fix sample bias for dispatched micro-opsKim Phillips1-3/+10
2019-07-13perf/x86/amd/uncore: Set the thread mask for F17h L3 PMCsKim Phillips1-4/+11
2019-07-13perf/x86/amd/uncore: Do not set 'ThreadMask' and 'SliceMask' for non-L3 PMCsKim Phillips1-1/+1
2019-06-19treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500Thomas Gleixner4-16/+4
2019-05-21treewide: Add SPDX license identifier for missed filesThomas Gleixner1-0/+1
2019-05-08perf/x86/amd/iommu: Make the 'amd_iommu_attr_groups' symbol staticWang Hai1-1/+1
2019-05-02perf/x86/amd: Update generic hardware cache events for Family 17hKim Phillips1-3/+108
2019-04-18perf/x86/amd: Add event map for AMD Family 17hKim Phillips1-9/+26
2019-04-10x86/perf/amd: Remove need to check "running" bit in NMI handlerLendacky, Thomas1-2/+19
2019-04-03x86/perf/amd: Resolve NMI latency issues for active PMCsLendacky, Thomas1-1/+55
2019-04-03x86/perf/amd: Resolve race condition when disabling PMCLendacky, Thomas1-3/+62
2019-01-21perf/core, arch/x86: Strengthen exclusion checks with PERF_PMU_CAP_NO_EXCLUDEAndrew Murray2-10/+3
2019-01-21perf/core, arch/x86: Use PERF_PMU_CAP_NO_EXCLUDE for exclusion incapable PMUsAndrew Murray2-20/+3
2018-10-23Merge branch 'x86-cpu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...Linus Torvalds2-7/+17
2018-10-02perf/x86/amd/uncore: Set ThreadMask and SliceMask for L3 Cache perf eventsNatarajan, Janakarajan1-0/+10
2018-09-27x86/events: Add Hygon Dhyana support to PMU infrastructurePu Wen2-7/+17
2018-07-24perf/x86/amd/ibs: Don't access non-started eventThomas Gleixner1-1/+5
2018-06-12treewide: kzalloc() -> kcalloc()Kees Cook1-1/+1