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path: root/arch/x86/entry/entry_64.S
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2020-06-11x86/entry: Unbreak __irqentry_text_start/end magicThomas Gleixner1-1/+10
2020-06-11x86/entry: Remove DBn stacksPeter Zijlstra1-17/+0
2020-06-11x86/entry: Remove the TRACE_IRQS cruftThomas Gleixner1-13/+0
2020-06-11x86/entry: Move paranoid irq tracing out of ASM codeThomas Gleixner1-13/+0
2020-06-11x86/entry/64: Remove TRACE_IRQS_*_DEBUGThomas Gleixner1-45/+3
2020-06-11x86/entry/64: Remove IRQ stack switching ASMThomas Gleixner1-96/+0
2020-06-11x86/entry: Remove the apic/BUILD interrupt leftoversThomas Gleixner1-143/+0
2020-06-11x86/entry: Convert reschedule interrupt to IDTENTRY_SYSVEC_SIMPLEThomas Gleixner1-4/+0
2020-06-11x86/entry: Convert XEN hypercall vector to IDTENTRY_SYSVECThomas Gleixner1-5/+0
2020-06-11x86/entry: Convert various hypervisor vectors to IDTENTRY_SYSVECThomas Gleixner1-17/+0
2020-06-11x86/entry: Convert KVM vectors to IDTENTRY_SYSVEC*Thomas Gleixner1-7/+0
2020-06-11x86/entry: Convert various system vectorsThomas Gleixner1-19/+0
2020-06-11x86/entry: Convert SMP system vectors to IDTENTRY_SYSVECThomas Gleixner1-7/+0
2020-06-11x86/entry: Convert APIC interrupts to IDTENTRY_SYSVECThomas Gleixner1-6/+0
2020-06-11x86/entry: Provide IDTENTRY_SYSVECThomas Gleixner1-0/+8
2020-06-11x86/entry: Use idtentry for interruptsThomas Gleixner1-28/+3
2020-06-11x86/entry: Add IRQENTRY_IRQ macroThomas Gleixner1-0/+14
2020-06-11x86/irq: Convey vector as argument and not in ptregsThomas Gleixner1-33/+7
2020-06-11x86/entry/64: Remove error_exit()Thomas Gleixner1-9/+0
2020-06-11x86/entry: Change exit path of xen_failsafe_callbackThomas Gleixner1-1/+1
2020-06-11x86/entry: Remove the transition leftoversThomas Gleixner1-22/+4
2020-06-11x86/entry: Switch page fault exception to IDTENTRY_RAWThomas Gleixner1-19/+0
2020-06-11x86/entry/64: Simplify idtentry_bodyThomas Gleixner1-2/+0
2020-06-11x86/entry: Switch XEN/PV hypercall entry to IDTENTRYThomas Gleixner1-14/+6
2020-06-11x86/entry/64: Move do_softirq_own_stack() to CThomas Gleixner1-13/+0
2020-06-11x86/entry: Provide helpers for executing on the irqstackThomas Gleixner1-0/+39
2020-06-11x86/entry: Convert double fault exception to IDTENTRY_DFThomas Gleixner1-9/+1
2020-06-11x86/entry: Implement user mode C entry points for #DB and #MCEThomas Gleixner1-1/+1
2020-06-11x86/entry/64: Remove error code clearing from #DB and #MCE ASM stubThomas Gleixner1-1/+0
2020-06-11x86/entry: Convert Debug exception to IDTENTRY_DBThomas Gleixner1-2/+0
2020-06-11x86/entry: Convert NMI to IDTENTRY_NMIThomas Gleixner1-8/+7
2020-06-11x86/entry: Convert Machine Check to IDTENTRY_ISTThomas Gleixner1-3/+0
2020-06-11x86/entry: Convert INT3 exception to IDTENTRY_RAWThomas Gleixner1-2/+0
2020-06-11x86/entry: Convert SIMD coprocessor error exception to IDTENTRYThomas Gleixner1-1/+0
2020-06-11x86/entry: Convert Alignment check exception to IDTENTRYThomas Gleixner1-1/+0
2020-06-11x86/entry: Convert Coprocessor error exception to IDTENTRYThomas Gleixner1-1/+0
2020-06-11x86/entry: Convert Spurious interrupt bug exception to IDTENTRYThomas Gleixner1-1/+0
2020-06-11x86/entry: Convert General protection exception to IDTENTRYThomas Gleixner1-2/+1
2020-06-11x86/entry: Convert Stack segment exception to IDTENTRYThomas Gleixner1-1/+0
2020-06-11x86/entry: Convert Segment not present exception to IDTENTRYThomas Gleixner1-1/+0
2020-06-11x86/entry: Convert Invalid TSS exception to IDTENTRYThomas Gleixner1-1/+0
2020-06-11x86/entry: Convert Coprocessor segment overrun exception to IDTENTRYThomas Gleixner1-1/+0
2020-06-11x86/entry: Convert Device not available exception to IDTENTRYThomas Gleixner1-1/+0
2020-06-11x86/entry: Convert Invalid Opcode exception to IDTENTRYThomas Gleixner1-1/+0
2020-06-11x86/entry: Convert Bounds exception to IDTENTRYThomas Gleixner1-1/+0
2020-06-11x86/entry: Convert Overflow exception to IDTENTRYThomas Gleixner1-1/+0
2020-06-11x86/entry: Convert Divide Error to IDTENTRYThomas Gleixner1-1/+0
2020-06-11x86/idtentry: Provide macros to define/declare IDT entry pointsThomas Gleixner1-0/+6
2020-06-11x86/entry/64: Provide sane error entry/exitThomas Gleixner1-3/+19
2020-06-11x86/entry: Distangle idtentryThomas Gleixner1-183/+220
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