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2019-07-18Merge tag 'riscv/for-v5.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/g...Linus Torvalds3-31/+43
2019-07-11RISC-V: Add an Image header that boot loader can parse.Atish Patra1-0/+32
2019-07-09RISC-V: Setup initial page tables in two stagesAnup Patel2-12/+11
2019-07-08Merge branch 'siginfo-linus' of git://git.kernel.org/pub/scm/linux/kernel/git...Linus Torvalds2-6/+7
2019-07-01riscv: Remove gate area stubsAndy Lutomirski1-19/+0
2019-06-21Merge tag 'spdx-5.2-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/gre...Linus Torvalds4-40/+4
2019-06-19treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500Thomas Gleixner1-4/+1
2019-06-19treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 234Thomas Gleixner3-36/+3
2019-06-17Merge tag 'riscv-for-v5.2/fixes-rc6' of git://git.kernel.org/pub/scm/linux/ke...Linus Torvalds1-0/+1
2019-06-11riscv: export pm_power_off againAndreas Schwab1-0/+1
2019-06-05treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286Thomas Gleixner20-180/+20
2019-05-30treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174Thomas Gleixner2-18/+2
2019-05-30treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157Thomas Gleixner1-9/+1
2019-05-29signal: Remove the task parameter from force_sig_faultEric W. Biederman1-2/+2
2019-05-29signal: Explicitly call force_sig_fault on currentEric W. Biederman1-1/+1
2019-05-29signal/riscv: Remove tsk parameter from do_trapEric W. Biederman1-3/+4
2019-05-27signal: Remove task parameter from force_sigEric W. Biederman1-1/+1
2019-05-24treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 120Thomas Gleixner3-42/+3
2019-05-21treewide: Add SPDX license identifier - Makefile/KconfigThomas Gleixner2-0/+2
2019-05-19Merge tag 'riscv-for-linus-5.2-mw2' of git://git.kernel.org/pub/scm/linux/ker...Linus Torvalds14-125/+115
2019-05-16RISC-V: Avoid using invalid intermediate translationsPalmer Dabbelt1-2/+10
2019-05-16riscv: Support BUG() in kernel moduleVincent Chen1-1/+1
2019-05-16riscv: Add the support for c.ebreak check in is_valid_bugaddr()Vincent Chen1-3/+17
2019-05-16riscv: move flush_icache_{all,mm} to cacheflush.cGary Guo1-49/+0
2019-05-16RISC-V: Access CSRs using CSR numbersAnup Patel5-25/+25
2019-05-16RISC-V: Add interrupt related SCAUSE defines in asm/csr.hAnup Patel1-12/+4
2019-05-16RISC-V: Fix minor checkpatch issues.Atish Patra1-2/+2
2019-05-16RISC-V: Support nr_cpus command line option.Atish Patra1-1/+9
2019-04-30RISC-V: Implement nosmp commandline option.Atish Patra1-1/+11
2019-04-30RISC-V: Add RISC-V specific arch_match_cpu_phys_idAtish Patra2-2/+7
2019-04-29riscv: vdso: drop unnecessary cc-ldoptionNick Desaulniers1-1/+1
2019-04-25riscv: call pm_power_off from machine_halt / machine_power_offChristoph Hellwig1-6/+9
2019-04-25riscv: print the unexpected interrupt causeChristoph Hellwig1-1/+2
2019-04-25riscv: remove duplicate macros from ptrace.hChristoph Hellwig2-6/+6
2019-04-25riscv: remove unreachable !HAVE_FUNCTION_GRAPH_RET_ADDR_PTR codeChristoph Hellwig1-4/+0
2019-04-25riscv: cleanup the parse_dtb calling conventionsChristoph Hellwig2-4/+5
2019-04-25riscv: simplify the stack pointer setup in head.SChristoph Hellwig2-7/+1
2019-04-25riscv: clear all pending interrupts when bootingChristoph Hellwig1-1/+2
2019-04-25riscv/signal: Fixup additional syscall restartingGuo Ren1-0/+6
2019-04-14riscv/stacktrace: Remove the pointless ULONG_MAX markerThomas Gleixner1-2/+0
2019-03-28RISC-V: Use IS_ENABLED(CONFIG_CMODEL_MEDLOW)Joe Perches1-1/+1
2019-03-26RISC-V: Always compile mm/init.c with cmodel=medany and notraceAnup Patel2-11/+0
2019-03-07Merge tag 'riscv-for-linus-5.1-mw0' of git://git.kernel.org/pub/scm/linux/ker...Linus Torvalds6-184/+71
2019-03-06Merge branch 'akpm' (patches from Andrew)Linus Torvalds1-1/+0
2019-03-05riscv/vdso: don't clear PG_reservedDavid Hildenbrand1-1/+0
2019-03-05Merge branch 'timers-2038-for-linus' of git://git.kernel.org/pub/scm/linux/ke...Linus Torvalds1-0/+2
2019-03-04RISC-V: Fixmap support and MM cleanupsPalmer Dabbelt2-127/+5
2019-03-04arch: riscv: fix logic error in parse_dtbAndreas Schwab1-1/+1
2019-03-04RISC-V: Assign hwcap as per comman capabilities.Atish Patra1-19/+22
2019-03-04RISC-V: Compare cpuid with NR_CPUS before mapping.Atish Patra1-0/+5