summaryrefslogtreecommitdiffstats
path: root/arch/riscv/kernel
AgeCommit message (Expand)AuthorFilesLines
2018-06-16Merge tag 'riscv-for-linus-4.18-merge_window' of git://git.kernel.org/pub/scm...Linus Torvalds6-3/+503
2018-06-11RISC-V: Make our port sparse-cleanPalmer Dabbelt2-2/+3
2018-06-11RISC-V: Handle R_RISCV_32 in modulesAndreas Schwab1-0/+12
2018-06-11riscv/ftrace: Export _mcount when DYNAMIC_FTRACE isn't setAlan Kao1-1/+1
2018-06-09riscv: split the declaration of __copy_userLuc Van Oostenryck1-1/+2
2018-06-08Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/a...Linus Torvalds1-1/+0
2018-06-07riscv: no __user for probe_kernel_address()Luc Van Oostenryck1-1/+1
2018-06-04Merge branch 'siginfo-linus' of git://git.kernel.org/pub/scm/linux/kernel/git...Linus Torvalds1-14/+2
2018-06-04perf: riscv: preliminary RISC-V supportAlan Kao2-0/+487
2018-05-19riscv: add swiotlb supportChristoph Hellwig1-0/+2
2018-05-17drivers: base: cacheinfo: setup DT cache properties earlyJeremy Linton1-1/+0
2018-04-25signal/riscv: Replace do_trap_siginfo with force_sig_faultEric W. Biederman1-8/+2
2018-04-25signal/riscv: Use force_sig_fault where appropriateEric W. Biederman1-8/+1
2018-04-25signal: Ensure every siginfo we send has all bits initializedEric W. Biederman1-0/+1
2018-04-24RISC-V: build vdso-dummy.o with -no-pieAurelien Jarno1-1/+1
2018-04-04Merge tag 'riscv-for-linus-4.17-mw0' of git://git.kernel.org/pub/scm/linux/ke...Linus Torvalds8-19/+772
2018-04-04Merge branch 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kerne...Linus Torvalds2-17/+3
2018-04-02RISC-V: Fixes to module loadingPalmer Dabbelt4-6/+338
2018-04-02RISC-V: Support SUB32 relocation type in kernel moduleZong Li1-0/+8
2018-04-02RISC-V: Support ADD32 relocation type in kernel moduleZong Li1-0/+8
2018-04-02RISC-V: Support ALIGN relocation type in kernel moduleZong Li1-0/+10
2018-04-02RISC-V: Support RVC_BRANCH/JUMP relocation type in kernel modulewqZong Li1-0/+35
2018-04-02RISC-V: Support HI20/LO12_I/LO12_S relocation type in kernel moduleZong Li1-0/+42
2018-04-02RISC-V: Support CALL relocation type in kernel moduleZong Li1-0/+22
2018-04-02RISC-V: Support GOT_HI20/CALL_PLT relocation type in kernel moduleZong Li1-10/+52
2018-04-02RISC-V: Add section of GOT.PLT for kernel moduleZong Li2-2/+20
2018-04-02RISC-V: Add sections of PLT and GOT for kernel moduleZong Li3-0/+147
2018-04-02riscv/ftrace: Add HAVE_FUNCTION_GRAPH_RET_ADDR_PTR supportAlan Kao2-1/+7
2018-04-02riscv/ftrace: Add DYNAMIC_FTRACE_WITH_REGS supportAlan Kao2-0/+139
2018-04-02riscv/ftrace: Add ARCH_SUPPORTS_FTRACE_OPS supportAlan Kao1-0/+3
2018-04-02riscv/ftrace: Add dynamic function graph tracer supportAlan Kao2-1/+118
2018-04-02riscv/ftrace: Add dynamic function tracer supportAlan Kao4-12/+168
2018-04-02mm: add ksys_mmap_pgoff() helper; remove in-kernel calls to sys_mmap_pgoff()Dominik Brodowski1-2/+2
2018-03-14RISC-V: Move to the new GENERIC_IRQ_MULTI_HANDLER handlerPalmer Dabbelt2-17/+3
2018-02-20Rename sbi_save to parse_dtb to improve code readabilityMichael Clark2-2/+2
2018-02-20RISC-V: Enable IRQ during exception handlingzongbox@gmail.com1-2/+3
2018-02-07Merge tag 'riscv-for-linus-4.16-merge_window' of git://git.kernel.org/pub/scm...Linus Torvalds7-42/+193
2018-01-31Merge branch 'work.whack-a-mole' of git://git.kernel.org/pub/scm/linux/kernel...Linus Torvalds1-1/+1
2018-01-30riscv: rename sptbr to satpChristoph Hellwig1-3/+3
2018-01-30riscv: add ZONE_DMA32Christoph Hellwig1-0/+9
2018-01-30riscv: disable SUM in the exception handlerChristoph Hellwig1-3/+6
2018-01-30riscv: remove redundant unlikely()Tobias Klauser1-1/+1
2018-01-30riscv/ftrace: Add basic supportAlan Kao3-0/+174
2018-01-30RISC-V: Remove mem_end command line processingPalmer Dabbelt1-19/+0
2018-01-30RISC-V: Remove duplicate command-line parsing logicMichael Clark1-16/+0
2018-01-07riscv: rename SR_* constants to match the specChristoph Hellwig2-6/+6
2018-01-07RISC-V: Make __NR_riscv_flush_icache visible to userspacePalmer Dabbelt2-2/+0
2017-12-11RISC-V: Remove unused CONFIG_HVC_RISCV_SBI codePalmer Dabbelt1-11/+0
2017-12-11RISC-V: Logical vs Bitwise typoDan Carpenter1-1/+1
2017-12-04riscv: use linux/uaccess.h, not asm/uaccess.h...Al Viro1-1/+1