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2020-12-18Merge tag 'riscv-for-linus-5.11-mw0' of git://git.kernel.org/pub/scm/linux/ke...Linus Torvalds1-4/+175
2020-11-25RISC-V: Protect all kernel sections including init earlyAtish Patra1-0/+12
2020-11-25RISC-V: Initialize SBI earlyAtish Patra1-4/+3
2020-11-25RISC-V: Add missing jump label initializationAnup Patel1-0/+1
2020-11-09RISC-V: Add kernel image sections to the resource treeNick Kossifidis1-0/+160
2020-10-25treewide: Convert macro and uses of __section(foo) to __section("foo")Joe Perches1-2/+2
2020-10-02RISC-V: Add EFI runtime servicesAtish Patra1-2/+5
2020-10-02RISC-V: Add early ioremap supportAtish Patra1-0/+2
2020-10-02RISC-V: Move DT mapping outof fixmapAnup Patel1-2/+7
2020-08-20RISC-V: Remove CLINT related code from timer and archAnup Patel1-2/+0
2020-06-09mm: don't include asm/pgtable.h if linux/mm.h is already includedMike Rapoport1-1/+0
2020-05-18riscv: Allow device trees to be built into the kernelPalmer Dabbelt1-0/+4
2020-03-31RISC-V: Support cpu hotplugAtish Patra1-1/+18
2020-03-31RISC-V: Add basic support for SBI v0.2Atish Patra1-0/+5
2020-03-03riscv: force hart_lottery to put in .sdata sectionZong Li1-2/+6
2020-01-31Merge tag 'riscv-for-linus-5.6-mw0' of git://git.kernel.org/pub/scm/linux/ker...Linus Torvalds1-0/+5
2020-01-22riscv: Add KASAN supportNick Hu1-0/+5
2020-01-14arch/riscv/setup: Drop dummy_con initializationArvind Sankar1-4/+0
2019-11-17riscv: provide native clint access for M-modeChristoph Hellwig1-0/+2
2019-10-28riscv: add prototypes for assembly language functions from head.SPaul Walmsley1-0/+2
2019-07-09RISC-V: Setup initial page tables in two stagesAnup Patel1-4/+2
2019-05-24treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 120Thomas Gleixner1-14/+1
2019-04-25riscv: cleanup the parse_dtb calling conventionsChristoph Hellwig1-2/+4
2019-03-26RISC-V: Always compile mm/init.c with cmodel=medany and notraceAnup Patel1-8/+0
2019-03-04RISC-V: Fixmap support and MM cleanupsPalmer Dabbelt1-126/+4
2019-03-04arch: riscv: fix logic error in parse_dtbAndreas Schwab1-1/+1
2019-03-04RISC-V: Move cpuid to hartid mapping to SMP.Atish Patra1-9/+0
2019-02-21RISC-V: Move setup_vm() to mm/init.cAnup Patel1-49/+0
2019-02-21RISC-V: Move setup_bootmem() to mm/init.cAnup Patel1-72/+0
2019-02-21RISC-V: Setup init_mm before parse_early_param()Anup Patel1-5/+4
2019-02-11riscv: use pr_info and friendsJohan Hovold1-3/+3
2019-01-23riscv: fixup max_low_pfn with PFN_DOWN.Guo Ren1-1/+1
2019-01-07arch: riscv: support kernel command line forcing when no DTB passedPaul Walmsley1-1/+8
2018-12-17RISC-V: Remove EARLY_PRINTK supportAnup Patel1-28/+0
2018-10-22RISC-V: SMP cleanup and new featuresPalmer Dabbelt1-0/+10
2018-10-22RISC-V: Use Linux logical CPU number instead of hartidAtish Patra1-0/+6
2018-10-22RISC-V: Add logical CPU indexing for RISC-VAtish Patra1-0/+4
2018-10-22RISC-V: Use swiotlb on RV64 onlyZong Li1-0/+3
2018-10-02RISCV: Fix end PFN for low memoryAtish Patra1-1/+1
2018-09-04riscv: Do not overwrite initrd_start and initrd_endGuenter Roeck1-7/+0
2018-08-13RISC-V: Add early printk support via the SBI consolePalmer Dabbelt1-0/+27
2018-07-04riscv: remove unnecessary of_platform_populate callRob Herring1-5/+0
2018-05-19riscv: add swiotlb supportChristoph Hellwig1-0/+2
2018-02-20Rename sbi_save to parse_dtb to improve code readabilityMichael Clark1-1/+1
2018-01-30riscv: add ZONE_DMA32Christoph Hellwig1-0/+9
2018-01-30RISC-V: Remove mem_end command line processingPalmer Dabbelt1-19/+0
2018-01-30RISC-V: Remove duplicate command-line parsing logicMichael Clark1-16/+0
2017-12-11RISC-V: Remove unused CONFIG_HVC_RISCV_SBI codePalmer Dabbelt1-11/+0
2017-11-30RISC-V: Export some expected symbols for modulesOlof Johansson1-0/+2
2017-11-30RISC-V: move empty_zero_page definition to C and export itOlof Johansson1-0/+3