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path: root/arch/riscv/kernel/cpu.c
AgeCommit message (Expand)AuthorFilesLines
2019-06-05treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286Thomas Gleixner1-9/+1
2019-04-30RISC-V: Add RISC-V specific arch_match_cpu_phys_idAtish Patra1-2/+1
2019-03-04RISC-V: Remove NR_CPUs check during hartid search from DTAtish Patra1-4/+0
2019-02-11riscv: treat cpu devicetree nodes without status as enabledJohan Hovold1-7/+3
2019-02-11riscv: fix riscv_of_processor_hartid() commentJohan Hovold1-9/+9
2019-02-11riscv: add missing newlines to printk messagesJohan Hovold1-1/+1
2018-12-21RISC-V: Fix of_node_* refcountAtish Patra1-0/+1
2018-11-20RISC-V: recognize S/U mode bits in print_isaPatrick Stählin1-3/+6
2018-10-22RISC-V: Show CPU ID and Hart ID separately in /proc/cpuinfoAnup Patel1-4/+6
2018-10-22RISC-V: Use Linux logical CPU number instead of hartidAtish Patra1-3/+5
2018-10-22RISC-V: Rename riscv_of_processor_hart to riscv_of_processor_hartidPalmer Dabbelt1-2/+5
2018-10-22RISC-V: Filter ISA and MMU values in cpuinfoPalmer Dabbelt1-7/+61
2017-09-26RISC-V: Init and Halt CodePalmer Dabbelt1-0/+108