Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2020-08-20 | RISC-V: Remove CLINT related code from timer and arch | Anup Patel | 1 | -63/+0 |
2020-08-20 | RISC-V: Add mechanism to provide custom IPI operations | Anup Patel | 1 | -2/+21 |
2019-11-17 | riscv: provide native clint access for M-mode | Christoph Hellwig | 1 | -0/+44 |