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2022-07-11riscv: Fix missing PAGE_PFN_MASKAlexandre Ghiti2-9/+9
2022-06-17riscv: Fix ALT_THEAD_PMA's asm parametersNathan Chancellor1-7/+7
2022-06-02riscv: Move alternative length validation into subsectionNathan Chancellor1-2/+2
2022-06-01riscv: Wire up memfd_secret in UAPI headerTobias Klauser2-1/+1
2022-06-01riscv: Fix irq_work when SMP is disabledSamuel Holland1-1/+1
2022-05-31Merge tag 'riscv-for-linus-5.19-mw0' of git://git.kernel.org/pub/scm/linux/ke...Linus Torvalds26-115/+693
2022-05-30RISC-V: Prepare dropping week attribute from arch_kexec_apply_relocations[_add]Uwe Kleine-König1-0/+7
2022-05-26RISC-V: Various XIP fixesPalmer Dabbelt2-26/+31
2022-05-26Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvmLinus Torvalds3-23/+122
2022-05-26Merge tag 'mm-stable-2022-05-25' of git://git.kernel.org/pub/scm/linux/kernel...Linus Torvalds2-6/+65
2022-05-26Merge tag 'asm-generic-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git...Linus Torvalds3-160/+4
2022-05-25RISC-V: Split out the XIP fixups into their own filePalmer Dabbelt2-26/+31
2022-05-24Merge tag 'random-5.19-rc1-for-linus' of git://git.kernel.org/pub/scm/linux/k...Linus Torvalds1-1/+1
2022-05-23Merge tag 'x86_core_for_v5.19_rc1' of git://git.kernel.org/pub/scm/linux/kern...Linus Torvalds1-2/+2
2022-05-21riscv: atomic: Add custom conditional atomic operation implementationGuo Ren1-0/+82
2022-05-21riscv: atomic: Optimize dec_if_positive functionsGuo Ren1-10/+10
2022-05-21riscv: atomic: Cleanup unnecessary definitionGuo Ren1-12/+0
2022-05-20Merge tag 'generic-ticket-spinlocks-v6' into for-nextPalmer Dabbelt3-160/+4
2022-05-20RISC-V: KVM: Introduce ISA extension registerAtish Patra1-0/+20
2022-05-20RISC-V: KVM: Cleanup stale TLB entries when host CPU changesAnup Patel1-0/+5
2022-05-20RISC-V: KVM: Add remote HFENCE functions based on VCPU requestsAnup Patel1-0/+59
2022-05-20RISC-V: KVM: Reduce KVM_MAX_VCPUS valueAnup Patel1-2/+1
2022-05-20RISC-V: KVM: Introduce range based local HFENCE functionsAnup Patel1-5/+20
2022-05-20RISC-V: KVM: Add Sv57x4 mode support for G-stageAnup Patel1-0/+1
2022-05-20RISC-V: KVM: Use G-stage name for hypervisor page tableAnup Patel1-15/+15
2022-05-19riscv: kexec: add kexec_file_load() supportPalmer Dabbelt1-0/+4
2022-05-19bug: Use normal relative pointers in 'struct bug_entry'Josh Poimboeuf1-2/+2
2022-05-19riscv/mm: fix two page table check related issuesTong Tiangen2-5/+5
2022-05-19RISC-V: Add kexec_file supportLiao Chang1-0/+4
2022-05-19RISC-V: Add support for rv32 userspace via COMPATPalmer Dabbelt12-6/+242
2022-05-17riscv: compat: signal: Add rt_frame implementationGuo Ren1-0/+18
2022-05-13riscv: use fallback for random_get_entropy() instead of zeroJason A. Donenfeld1-1/+1
2022-05-13riscv/mm: enable ARCH_SUPPORTS_PAGE_TABLE_CHECKTong Tiangen1-6/+65
2022-05-11riscv: add memory-type errata for T-HeadHeiko Stuebner5-7/+86
2022-05-11riscv: remove FIXMAP_PAGE_IO and fall back to its default valueHeiko Stuebner1-2/+0
2022-05-11riscv: add RISC-V Svpbmt extension supportHeiko Stuebner7-9/+99
2022-05-11riscv: Fix accessing pfn bits in PTEs for non-32bit variantsHeiko Stuebner4-12/+24
2022-05-11riscv: prevent compressed instructions in alternativesHeiko Stuebner1-0/+24
2022-05-11riscv: extend concatenated alternatives-lines to the same lengthHeiko Stuebner1-10/+10
2022-05-11riscv: implement ALTERNATIVE_2 macroHeiko Stuebner1-20/+58
2022-05-11riscv: implement module alternativesHeiko Stuebner1-0/+3
2022-05-11riscv: allow different stages with alternativesHeiko Stuebner1-1/+4
2022-05-11riscv: integrate alternatives better into the main architectureHeiko Stuebner2-3/+12
2022-05-11RISC-V: Move to queued RW locksPalmer Dabbelt3-123/+2
2022-05-11RISC-V: Move to generic spinlocksPalmer Dabbelt3-45/+10
2022-04-26riscv: compat: vdso: Add setup additional pages implementationGuo Ren2-0/+6
2022-04-26riscv: compat: vdso: Add COMPAT_VDSO base code implementationGuo Ren1-0/+9
2022-04-26riscv: compat: Add hw capability check for elfGuo Ren1-2/+4
2022-04-26riscv: compat: Add elf.h implementationGuo Ren1-1/+40
2022-04-26riscv: compat: syscall: Add entry.S implementationGuo Ren1-0/+7