Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2021-01-14 | riscv: Add dump stack in show_regs | Kefeng Wang | 1 | -0/+1 |
2020-03-26 | riscv: add macro to get instruction length | Zong Li | 1 | -0/+8 |
2019-10-23 | riscv: cleanup <asm/bug.h> | Christoph Hellwig | 1 | -13/+3 |
2019-07-08 | Merge branch 'siginfo-linus' of git://git.kernel.org/pub/scm/linux/kernel/git... | Linus Torvalds | 1 | -1/+1 |
2019-06-05 | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286 | Thomas Gleixner | 1 | -9/+1 |
2019-05-29 | signal/riscv: Remove tsk parameter from do_trap | Eric W. Biederman | 1 | -1/+1 |
2019-05-16 | riscv: Add the support for c.ebreak check in is_valid_bugaddr() | Vincent Chen | 1 | -1/+6 |
2019-05-16 | riscv: support trap-based WARN() | Vincent Chen | 1 | -10/+18 |
2017-11-30 | RISC-V: use RISCV_{INT,SHORT} instead of {INT,SHORT} for asm macros | Olof Johansson | 1 | -3/+3 |
2017-09-26 | RISC-V: Init and Halt Code | Palmer Dabbelt | 1 | -0/+88 |