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path: root/arch/mips/kernel/mips-cm.c
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2020-05-07mips: cm: Add L2 ECC/parity errors reportingSerge Semin1-2/+60
2020-05-07mips: cm: Fix an invalid error code of INTVN_*_ERRSerge Semin1-3/+3
2020-01-06remove ioremap_nocache and devm_ioremap_nocacheChristoph Hellwig1-2/+2
2019-05-30treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152Thomas Gleixner1-5/+1
2019-03-05Merge tag 'mips_5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linuxLinus Torvalds1-2/+2
2019-02-15MIPS: CM: Fix indentationPaul Burton1-2/+2
2019-02-07mips: cm: reprime error causeVladimir Kondratiev1-1/+1
2018-01-10MIPS: CM: Drop WARN_ON(vp != 0)James Hogan1-1/+0
2017-11-03Update MIPS email addressesPaul Burton1-1/+1
2017-08-30MIPS: CPS: Have asm/mips-cps.h include CM & CPC headersPaul Burton1-1/+1
2017-08-30MIPS: CM: Add cluster & block args to mips_cm_lock_other()Paul Burton1-3/+16
2017-08-30MIPS: Abstract CPU core & VP(E) ID access through accessor functionsPaul Burton1-2/+2
2017-08-30MIPS: CPS: Use change_*, set_* & clear_* where appropriatePaul Burton1-3/+1
2017-08-29MIPS: CM: Use BIT/GENMASK for register fields, order & drop shiftsPaul Burton1-24/+24
2017-08-29MIPS: CM: Specify register size when generating accessorsPaul Burton1-6/+3
2017-08-29MIPS: CM: Rename mips_cm_base to mips_gcr_basePaul Burton1-5/+5
2017-06-29MIPS: CM: WARN on attempt to lock invalid VP, not BUGPaul Burton1-1/+1
2017-06-29MIPS: CM: Avoid per-core locking with CM3 & higherPaul Burton1-6/+32
2016-08-04tree-wide: replace config_enabled() with IS_ENABLED()Masahiro Yamada1-1/+1
2016-04-03MIPS: Fix misspellings in comments.Adam Buchbinder1-1/+1
2015-11-11MIPS: CM, CPC: Ensure core-other GCRs reflect the correct corePaul Burton1-0/+6
2015-11-11MIPS: CM: Introduce core-other locking functionsPaul Burton1-0/+39
2015-10-26MIPS: Always read full 64 bit CM error GCRs for CM3Paul Burton1-34/+36
2015-10-26MIPS: Avoid buffer overrun in mips_cm_error_reportPaul Burton1-0/+2
2015-10-26MIPS: Don't read GCRs when a CM is not presentPaul Burton1-7/+10
2015-08-26MIPS: CM: Add support for reporting CM cache errorsMarkos Chandras1-0/+244
2015-08-26MIPS: CM: The CMGCRBase register is 64-bit on 64 bit kernels.Markos Chandras1-1/+1
2015-08-26MIPS: mips-cm: Extend CM accessors for 64-bit CPUsMarkos Chandras1-0/+4
2015-08-26MIPS: Add platform callback before initializing the L2 cacheMarkos Chandras1-0/+7
2014-11-24MIPS: Replace use of phys_t with phys_addr_t.Ralf Baechle1-6/+6
2014-03-06MIPS: Add generic CM probe & access codePaul Burton1-0/+121