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path: root/arch/mips/include/asm/mach-cavium-octeon/war.h
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2020-09-07MIPS: Remove mach-*/war.hThomas Bogendoerfer1-12/+0
2020-09-07MIPS: Get rid of CAVIUM_OCTEON_DCACHE_PREFETCH_WARThomas Bogendoerfer1-3/+0
2020-09-07MIPS: Get rid of BCM1250_M3_WARThomas Bogendoerfer1-2/+0
2020-09-07MIPS: Replace SIBYTE_1956_WAR by CONFIG_SB1_PASS_2_WORKAROUNDSThomas Bogendoerfer1-1/+0
2020-09-07MIPS: Convert MIPS34K_MISSED_ITLB_WAR into a config optionThomas Bogendoerfer1-1/+0
2020-09-07MIPS: Convert R10000_LLSC_WAR info a config optionThomas Bogendoerfer1-1/+0
2020-09-07MIPS: Convert ICACHE_REFILLS_WORKAROUND_WAR into a config optionThomas Bogendoerfer1-1/+0
2020-09-07MIPS: Convert TX49XX_ICACHE_INDEX_INV into a config optionThomas Bogendoerfer1-1/+0
2020-09-07MIPS: Remove MIPS4K_ICACHE_REFILL_WAR and MIPS_CACHE_SYNC_WARThomas Bogendoerfer1-2/+0
2020-09-07MIPS: Convert R4600_V2_HIT_CACHEOP into a config optionThomas Bogendoerfer1-1/+0
2020-09-07MIPS: Convert R4600_V1_HIT_CACHEOP into a config optionThomas Bogendoerfer1-1/+0
2020-09-07MIPS: Convert R4600_V1_INDEX_ICACHEOP into a config optionThomas Bogendoerfer1-1/+0
2019-07-23MIPS: Remove unused R5432_CP0_INTERRUPT_WARPaul Burton1-1/+0
2015-02-20MIPS: OCTEON: Implement DCache errata workaround for all CN6XXXDavid Daney1-0/+3
2012-12-13MIPS: PMC-Sierra Yosemite: Remove support.Ralf Baechle1-1/+0
2009-01-11MIPS: Add Cavium OCTEON processor support files to arch/mips/cavium-octeon.David Daney1-0/+26