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2018-02-06arm64: futex: Mask __user pointers prior to dereferenceWill Deacon1-3/+6
2018-02-06arm64: uaccess: Mask __user pointers for __arch_{clear, copy_*}_userWill Deacon1-7/+22
2018-02-06arm64: uaccess: Don't bother eliding access_ok checks in __{get, put}_userWill Deacon1-22/+32
2018-02-06arm64: uaccess: Prevent speculative use of the current addr_limitWill Deacon1-0/+7
2018-02-06arm64: entry: Ensure branch through syscall table is bounded under speculationWill Deacon1-0/+11
2018-02-06arm64: Use pointer masking to limit uaccess speculationRobin Murphy1-3/+23
2018-02-06arm64: Make USER_DS an inclusive limitRobin Murphy2-19/+29
2018-02-06arm64: Implement array_index_mask_nospec()Robin Murphy1-0/+21
2018-02-06arm64: barrier: Add CSDB macros to control data-value predictionWill Deacon2-0/+8
2018-02-06arm64: assembler: Align phys_to_pte with pte_to_physWill Deacon1-0/+13
2018-02-06arm64: assembler: Change order of macro arguments in phys_to_ttbrWill Deacon1-1/+1
2018-02-06arm64: kpti: Add ->enable callback to remap swapper using nG mappingsWill Deacon1-0/+10
2018-02-06arm64: kpti: Make use of nG dependent on arm64_kernel_unmapped_at_el0()Will Deacon2-26/+16
2018-02-06arm64: Add software workaround for Falkor erratum 1041Shanker Donthineni1-0/+10
2018-02-06arm64: spinlock: Fix theoretical trylock() A-B-A with LSE atomicsWill Deacon1-2/+2
2018-01-16arm64: kpti: Fix the interaction between ASID switching and software PANCatalin Marinas4-14/+22
2018-01-16KVM: arm64: Emulate RAS error registers and set HCR_EL2's TERR & TEADongjiu Geng3-0/+19
2018-01-16KVM: arm64: Handle RAS SErrors from EL2 on guest exitJames Morse2-0/+6
2018-01-16KVM: arm64: Handle RAS SErrors from EL1 on guest exitJames Morse1-0/+2
2018-01-16KVM: arm64: Save/Restore guest DISR_EL1James Morse2-0/+2
2018-01-16KVM: arm64: Set an impdef ESR for Virtual-SError using VSESR_EL2.James Morse3-0/+9
2018-01-16KVM: arm/arm64: mask/unmask daif around VHE guestsJames Morse1-0/+10
2018-01-16arm64: kernel: Prepare for a DISR userJames Morse5-0/+30
2018-01-16arm64: Unconditionally enable IESB on exception entry/return for firmware-firstJames Morse1-8/+9
2018-01-16arm64: kernel: Survive corrected RAS errors notified by SErrorJames Morse2-0/+67
2018-01-16arm64: cpufeature: Detect CPU RAS ExtentionsXie XiuQi2-1/+4
2018-01-16arm64: sysreg: Move to use definitions for all the SCTLR bitsJames Morse1-2/+63
2018-01-16arm64: fpsimd: Fix state leakage when migrating after sigreturnDave Martin1-1/+1
2018-01-16arm64: Correct type for PUD macrosPunit Agrawal1-3/+3
2018-01-15arm64: fix comment above tcr_compute_pa_sizeKristina Martsenko1-1/+1
2018-01-15arm64: fix ID map extension to 52 bitsKristina Martsenko1-3/+2
2018-01-14arm64: cpu_errata: Add Kryo to Falkor 1003 errataStephen Boyd1-0/+2
2018-01-14arm64: Extend early page table code to allow for larger kernelsSteve Capper2-1/+47
2018-01-14arm64: Re-order reserved_ttbr0 in linker scriptSteve Capper2-6/+6
2018-01-14arm64: sdei: Add trampoline code for remapping the kernelJames Morse2-1/+8
2018-01-14arm64: mmu: add the entry trampolines start/end section markers into sections.hJames Morse1-0/+1
2018-01-13arm64: kernel: Add arch-specific SDEI entry code and CPU maskingJames Morse2-2/+48
2018-01-13arm64: uaccess: Add PAN helperJames Morse1-0/+12
2018-01-13arm64: Add vmap_stack header fileJames Morse1-0/+28
2018-01-13firmware: arm_sdei: Add driver for Software Delegated ExceptionsJames Morse1-0/+8
2018-01-13arm64: alternatives: use tpidr_el2 on VHE hostsJames Morse3-2/+19
2018-01-13KVM: arm64: Change hyp_panic()s dependency on tpidr_el2James Morse1-0/+2
2018-01-12Merge branch 'for-next/perf' of git://git.kernel.org/pub/scm/linux/kernel/git...Catalin Marinas1-0/+129
2018-01-08arm64: cputype: Add MIDR values for Cavium ThunderX2 CPUsJayachandran C1-0/+3
2018-01-08arm64: Implement branch predictor hardening for FalkorShanker Donthineni2-1/+4
2018-01-08arm64: cputype: Add missing MIDR values for Cortex-A72 and Cortex-A75Will Deacon1-0/+4
2018-01-08arm64: KVM: Use per-CPU vector when BP hardening is enabledMarc Zyngier1-0/+38
2018-01-08arm64: Add skeleton to harden the branch predictor against aliasing attacksWill Deacon3-1/+40
2018-01-08arm64: Move post_ttbr_update_workaround to C codeMarc Zyngier1-13/+0
2018-01-08arm64: Take into account ID_AA64PFR0_EL1.CSV3Will Deacon1-0/+1
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