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path: root/arch/arm/boot/dts/stih410-clock.dtsi
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2022-02-15ARM: dts: sti: ensure unique unit-address in stih410-clockAlain Volmat1-52/+48
Move quadfs and a9-mux clocks nodes into clockgen nodes so that they can get the reg property from the parent node and ensure only one node has the address. Signed-off-by: Alain Volmat <avolmat@me.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-08-06ARM: dts: sti: update clkgen-fsyn entries in stih410-clockAlain Volmat1-24/+3
The clkgen-fsyn driver now embed the clock names (assuming the right compatible is used). Remove all clock-output-names property and update when necessary the compatible. Signed-off-by: Alain Volmat <avolmat@me.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-08-06ARM: dts: sti: update clkgen-pll entries in stih410-clockAlain Volmat1-13/+3
The clkgen-pll driver now embed the clock names (assuming the right compatible is used). Remove all clock-output-names property and update when necessary the compatible. Signed-off-by: Alain Volmat <avolmat@me.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-08-06ARM: dts: sti: update flexgen compatible within stih410-clockAlain Volmat1-89/+6
With the introduction of new flexgen compatible within the clk-flexgen driver, remove the clock-output-names entry from the flexgen nodes and set the new proper compatible corresponding. Signed-off-by: Alain Volmat <avolmat@me.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2019-06-19treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500Thomas Gleixner1-4/+1
Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation # extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 4122 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Enrico Weigelt <info@metux.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2018-02-13ARM: dts: STi: Remove unused clk_ext2f_a9 clockPatrice Chotard1-11/+0
This clock node is unused, remove it. This allows to fix the following warnings when compiling dtb with W=1 option : arch/arm/boot/dts/stih410-b2120.dtb: Warning (simple_bus_reg): Node /clocks/clockgen-c0 missing or empty reg/ranges property arch/arm/boot/dts/stih410-b2260.dtb: Warning (simple_bus_reg): Node /clocks/clockgen-c0 missing or empty reg/ranges property arch/arm/boot/dts/stih418-b2199.dtb: Warning (simple_bus_reg): Node /clocks/clockgen-c0 missing or empty reg/ranges property Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-02-13ARM: dts: STi: Update clocks node locationPatrice Chotard1-42/+41
Move: _ arm_periph_clk node as child of clockgen-a9@92b0000 node _ clk_m_a9_ext2f_div2 node as child of clk_s_c0_flexgen node _ clk-tmdsout-hdmi node outiside soc node This allows to fix the following warnings when compiling dtb with W=1 option : arch/arm/boot/dts/stih410-b2120.dtb: Warning (simple_bus_reg): Node /clocks/clk-m-a9-periphs missing or empty reg/ranges property arch/arm/boot/dts/stih410-b2120.dtb: Warning (simple_bus_reg): Node /clocks/clk-m-a9-ext2f-div2s missing or empty reg/ranges property arch/arm/boot/dts/stih410-b2120.dtb: Warning (simple_bus_reg): Node /clocks/clk-tmdsout-hdmi missing or empty reg/ranges property arch/arm/boot/dts/stih410-b2120.dtb: Warning (simple_bus_reg): Node /clocks/clk-tmdsout-hdmi missing or empty reg/ranges property arch/arm/boot/dts/stih410-b2260.dtb: Warning (simple_bus_reg): Node /clocks/clk-m-a9-periphs missing or empty reg/ranges property arch/arm/boot/dts/stih410-b2260.dtb: Warning (simple_bus_reg): Node /clocks/clk-m-a9-ext2f-div2s missing or empty reg/ranges property arch/arm/boot/dts/stih410-b2260.dtb: Warning (simple_bus_reg): Node /clocks/clk-tmdsout-hdmi missing or empty reg/ranges property arch/arm/boot/dts/stih410-b2260.dtb: Warning (simple_bus_reg): Node /clocks/clk-tmdsout-hdmi missing or empty reg/ranges property arch/arm/boot/dts/stih418-b2199.dtb: Warning (simple_bus_reg): Node /clocks/clk-m-a9-periphs missing or empty reg/ranges property arch/arm/boot/dts/stih418-b2199.dtb: Warning (simple_bus_reg): Node /clocks/clk-m-a9-ext2f-div2s missing or empty reg/ranges property arch/arm/boot/dts/stih418-b2199.dtb: Warning (simple_bus_reg): Node /clocks/clk-tmdsout-hdmi missing or empty reg/ranges property arch/arm/boot/dts/stih418-b2199.dtb: Warning (simple_bus_reg): Node /clocks/clk-tmdsout-hdmi missing or empty reg/ranges property Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-02-12ARM: dts: STi: Fix bindings notationPatrice Chotard1-2/+2
Remove leading 0x and 0s from bindings notation Add missing unit-address and remove some which are useless. This allows to fix several warnings like : Warning (unit_address_vs_reg): Node XXXX has a reg or ranges property, but no unit name Warning (simple_bus_reg): Node XXXX simple-bus unit address format error, expected "123456" Warning (unit_address_vs_reg): Node XXXX has a unit name, but no reg property Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2017-10-20arm: dts: fix unit-address leading 0sRob Herring1-3/+3
Fix dtc warnings for 'simple_bus_reg' due to leading 0s. Converted using the following command: perl -p -i -e 's/\@0+([0-9a-f])/\@$1/g' `find arch/arm/boot/dts -type -f -name '*.dts*' Dropped changes to ARM, Ltd. boards LED nodes and manually fixed up some occurrences of uppercase hex. Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2016-10-20ARM: dts: stih410-clocks: Add PROC_STFE as a critical clockPeter Griffin1-1/+2
Once the ST frontend demux HW IP has been enabled, the clock can't be disabled otherwise the system will hang and the board will be unserviceable. To allow balanced clock enable/disable calls in the driver we use the critical clock infrastructure to take an extra reference on the clock so the clock will never actually be disabled. Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Acked-by: Patrice Chotard <patrice.chotard@st.com>
2016-09-16ARM: dts: STiH410: Enable synchronous clock mode for video clocksGabriel Fernandez1-1/+1
This patch enables the synchronous clock mode for video clocks on STiH410 board. Signed-off-by: Olivier Bideau <olivier.bideau@st.com> Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com> Acked-by: Peter Griffin <peter.griffin@linaro.org>
2016-09-16ARM: dts: STiH410: Enable clock propagation for audio clocksGabriel Fernandez1-1/+1
This patch is used in the clock driver to apply a clock propagation flag on the audio clocks of STiH410 Signed-off-by: Olivier Bideau <olivier.bideau@st.com> Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com> Acked-by: Peter Griffin <peter.griffin@linaro.org>
2016-09-16ARM: dts: STiH4xx: Simplify clock binding of STiH4xx platformsGabriel Fernandez1-8/+8
This patch simplifies the clock binding because we had too much detail. Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
2016-07-12ARM: sti: stih410-clocks: Identify critical clocksLee Jones1-0/+9
Lots of platforms contain clocks which if turned off would prove fatal. The only way to recover is to restart the board(s). This driver takes references to clocks which are required to be always-on. The Common Clk Framework will then take references to them. This way they will not be turned off during the clk_disabled_unused() procedure. In this patch we are identifying clocks, which if gated would render the STiH410 development board unserviceable. Signed-off-by: Lee Jones <lee.jones@linaro.org>
2015-07-22ARM: STi: DT: Rename st_pll3200c32_407_c0_x into st_pll3200c32_cx_xGabriel Fernandez1-2/+2
Use a generic name for this kind of PLL Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2014-11-18ARM: STi: DT: STiH410: Add STiH410 SoC and b2120 board support.Peter Griffin1-0/+338
The STiH410 is an advanced multi-HD AVC processor with 3D graphics acceleration and 1.5-GHz ARM Cortex-A9 SMP CPU part of the stih407 family. It has wide connectivity including USB 3.0, PCI-e, SATA and gigabit ethernet. Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
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