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2022-11-01ARM: dts: at91: sama7g5: use generic name for securamClaudiu Beznea1-1/+1
Use generic sram name for securam. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20221026124114.985876-11-claudiu.beznea@microchip.com
2022-11-01ARM: dts: at91: sama7g5: add thermal zones nodeClaudiu Beznea1-0/+42
Add thermal zones node with its associated trips and cooling-maps. It uses CPUFreq as cooling device for temperatures in the interval [90, 100) degrees Celsius and describe the temperature of 100 degrees Celsius as critical temperature. System will be is shutting down when reaching critical temperature. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20221026124114.985876-7-claudiu.beznea@microchip.com
2022-11-01ARM: dts: at91: sama7g5: add temperature sensorClaudiu Beznea1-0/+8
Add temperature sensor node. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20221026124114.985876-6-claudiu.beznea@microchip.com
2022-11-01ARM: dts: at91: sama7g5: add cells for temperature calibrationClaudiu Beznea1-0/+2
Add NVMEM cell to ADC for temperature calibration data. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20221026124114.985876-5-claudiu.beznea@microchip.com
2022-11-01ARM: dts: at91: sama7g5: add io-channel-cells to adc nodeClaudiu Beznea1-0/+1
Add io-channel-cell to ADC node. It is necessary for DT users of ADC. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20221026124114.985876-4-claudiu.beznea@microchip.com
2022-11-01ARM: dts: at91: sama7g5: add otpc nodeClaudiu Beznea1-0/+12
Add OTPC node along with temperature calibration cell. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20221026124114.985876-3-claudiu.beznea@microchip.com
2022-09-16ARM: dts: at91: Add `atmel,usart-mode` required property to serial nodesSergiu Moga1-0/+5
Add the missing required DT property `atmel,usart-mode` to the serial nodes of Atmel/Microchip DT files. Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220913142205.162399-4-sergiu.moga@microchip.com
2022-09-16ARM: dts: at91: sama7g5: Swap rx and tx for spi11Sergiu Moga1-3/+3
Swap the rx and tx of the DMA related DT properties of the spi11 node in order to maintain consistency across Microchip/Atmel SoC files. Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220913142205.162399-2-sergiu.moga@microchip.com
2022-07-04ARM: dts: at91: sama7g5: add reset-controller nodeClaudiu Beznea1-0/+7
Add reset controller node. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220610092414.1816571-10-claudiu.beznea@microchip.com
2022-05-27Merge tag 'at91-dt-5.19-2' of ↵Arnd Bergmann1-1/+25
git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/late AT91 DT #2 for 5.19: - at91: more DT compliance updates for RTC and RTT nodes - at91: sama7g5: add microphone support * tag 'at91-dt-5.19-2' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: ARM: dts: at91: sama7g5ek: add node for PDMC0 ARM: dts: at91: sama7g5: add nodes for PDMC ARM: dts: at91: Use the generic "rtc" node name for the rtt IPs ARM: dts: at91: Add the required 'atmel, rtt-rtc-time-reg' property Link: https://lore.kernel.org/r/20220517153252.92393-1-nicolas.ferre@microchip.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-05-26Merge tag 'arm-dt-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds1-1/+0
Pull ARM DT updates from Arnd Bergmann: "There are 40 branches this time, adding a lot of new hardware support, and cleanups. Krzysztof Kozlowski continues his treewide cleanups. There are a number of new SoCs, all of them as part of existing families, and typically added along with a reference board: - Renesas RZ/G2UL (R9A07G043) is the single-core version of the RZ/G2L general-purpose MPU. - Renesas RZ/V2M (R9A09G011) is a smart camera SoC - Renesas R-Car V4H (R8A779G0) is an automotive chip with Cortex-A76 cores and deep learning accerlation. - Broadcom BCM47622 is a new broadband SoC based on a quad Cortex-A7 and dual Wifi-6. - Corstone1000 is a generic platform from Arm that is used for designing custom SoCs, the support for now is for the Fixed Virtual Platform emulation for it. - Mediatek MT8195 (Kompanio 1200) is a high-end consumer chip used in upcoming Chromebooks. - NXP i.MXRT1050 is a Cortex-M7 based microcontroller, the first MMU-less SoC to be added in a while New machines based on already supported SoCs this time are mainly for 32-bit platforms and include: - Two wireless routers based on Broadcom bcm4708 - 30 new boards based on NXP i.MX6, i.MX7 and i.MX8 families, mostly for the industrial embedded market, and on NXP LS1021A based IOT board. - Two ethernet switches based on Microchip LAN966 - Eight Qualcomm Snapdragon based machines, including a smartwatch, a Chromebook board and some phones - Another phone based on the old ST-Ericsson Ux500 platform - Seven STM32MP1 based boards - Four single-board computers based on Rockchip RK3566/RK3568" * tag 'arm-dt-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (791 commits) ARM: dts: kswitch-d10: enable networking ARM: dts: lan966x: add switch node ARM: dts: lan966x: add serdes node ARM: dts: lan966x: add reset switch reset node ARM: dts: lan966x: add MIIM nodes ARM: dts: lan966x: add hwmon node ARM: dts: lan966x: add basic Kontron KSwitch D10 support ARM: dts: lan966x: add flexcom I2C nodes ARM: dts: lan966x: add flexcom SPI nodes ARM: dts: lan966x: add all flexcom usart nodes ARM: dts: lan966x: add missing uart DMA channel ARM: dts: lan966x: add sgpio node ARM: dts: lan966x: swap dma channels for crypto node ARM: dts: lan966x: rename pinctrl nodes ARM: dts: at91: sama7g5: remove interrupt-parent from gic node ARM: dts: at91: use generic node name for dataflash ARM: dts: turris-omnia: Add atsha204a node arm64: dts: mt8192: Follow binding order for SCP registers arm64: dts: mediatek: add mtk-snfi for mt7622 arm64: dts: mediatek: mt8195-demo: enable uart1 ...
2022-05-17ARM: dts: at91: sama7g5: add nodes for PDMCCodrin Ciubotariu1-0/+24
Microchip's SAMA7G5 embeds two PDMCs. The PDMCs can be used to connect 2x4 PDM microphones. Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/all/20220307122202.2251639-5-codrin.ciubotariu@microchip.com Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2022-05-17ARM: dts: at91: Use the generic "rtc" node name for the rtt IPsSergiu Moga1-1/+1
As the DT specification recommends, the node names should be of a generic nature. Thus, the most appropriate generic node name for the at91 rtt IPs is the "rtc" node name. Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/all/20220304161159.147784-3-sergiu.moga@microchip.com Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2022-05-13ARM: dts: at91: sama7g5: remove interrupt-parent from gic nodeEugen Hristev1-1/+0
interrupt-parent is not to be used as a boolean property. It is already present in the DT in the proper way it's supposed to be used: interrupt-parent = <&gic>; This is also reported by dtbs_check: arch/arm/boot/dts/at91-sama7g5ek.dtb: interrupt-controller@e8c11000: interrupt-parent: True is not of type 'array' From schema: /.local/lib/python3.8/site-packages/dtschema/schemas/interrupts.yaml Fixes: 7540629e2fc7 ("ARM: dts: at91: add sama7g5 SoC DT and sama7g5-ek") Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220503133127.64320-1-eugen.hristev@microchip.com Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2022-04-13ARM: dts: at91: sama7g5: Swap `rx` and `tx` for `i2c` nodesSergiu Moga1-9/+9
Swap `rx` and `tx` for the `dma-names` property of the `i2c` nodes in order to maintain consistency across Microchip/Atmel SoC files. Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20220310114553.184763-2-sergiu.moga@microchip.com
2022-03-04ARM: dts: at91: sama7g5: Add NAND supportTudor Ambarus1-0/+55
Add NAND support. The sama7g5's SMC IP is the same as sama5d2's with a slightly change: it provides a synchronous clock output (SMC clock) that is dedicated to FPGA usage. Since this doesn't interfere with the SMC NAND configuration, thus code will not be added in the current nand driver to address the FPGA usage, use the sama5d2's compatible and choose not to introduce dedicated compatibles for sama7g5. Tested with Micron MT29F4G08ABAEAWP NAND flash. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> [nicolas.ferre@microchip.com: add the definition of PMC_MCK1 in include/dt-bindings/clock/at91.h from another patch] Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20220111130556.905978-1-tudor.ambarus@microchip.com
2022-03-04ARM: dts: at91: sama7g5: add eic nodeClaudiu Beznea1-0/+13
Add EIC node. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20220228122326.1400954-2-claudiu.beznea@microchip.com
2022-03-04ARM: dts: at91: sama7g5: Remove unused properties in i2c nodesTudor Ambarus1-6/+0
The "atmel,use-dma-rx", "atmel,use-dma-rx" dt properties are not used by the i2c-at91 driver, nor they are defined in the bindings file, thus remove them. Cc: stable@vger.kernel.org Fixes: 7540629e2fc7 ("ARM: dts: at91: add sama7g5 SoC DT and sama7g5-ek") Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Eugen Hristev <eugen.hristev@microchip.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20220302161854.32177-1-tudor.ambarus@microchip.com
2022-02-25ARM: dts: at91: sama7g5: add oppsClaudiu Beznea1-0/+38
Add OPPs for SAMA7G5 along with clock for CPU. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20220113144900.906370-9-claudiu.beznea@microchip.com
2022-02-25ARM: dts: at91: sama7g5: Add can controllers of sama7g5Hari Prasath1-0/+96
Add support for all the six CAN controllers of sama7g5.The internal SRAM of 128KB is split among the CAN controllers for the message RAM elements leaving a small portion reserved for power management. The SRAM split up is as below. Lower 64K: PM 13K can-0 17K can-1 17K can-2 17K Higher 64K: can-3 17K can-4 17K can-5 17K Signed-off-by: Hari Prasath <Hari.PrasathGE@microchip.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20220222113924.25799-2-Hari.PrasathGE@microchip.com
2022-02-25ARM: dts: at91: sama7g5: Add crypto nodesTudor Ambarus1-0/+32
Describe and enable the AES, SHA and TDES crypto IPs. Tested with the extra run-time self tests of the registered crypto algorithms. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20220208105646.226623-1-tudor.ambarus@microchip.com
2022-02-24ARM: dts: at91: remove status = "okay" from soc specific dtsiClaudiu Beznea1-3/+0
Remove status = "okay" from SoC specific dtsi as this is the default state. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20220207111523.575474-1-claudiu.beznea@microchip.com
2021-12-13ARM: dts: at91: sama7g5: Add QSPI nodesTudor Ambarus1-0/+30
sama7g5 embedds 2 instances of QSPI controller: 1/ OSPI0 Supporting Up to 200 MHz DDR. Octal, TwinQuad, Hyperflash and OctaFlash Protocols Supported. 2/ QSPI1 Supporting Up to 90 MHz DDR/133 MHz SDR. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20211209123643.341892-1-tudor.ambarus@microchip.com
2021-11-03Merge tag 'dt-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds1-0/+43
Pull ARM SoC DT updates from Arnd Bergmann: "This is a rather large update for the ARM devicetree files, after a few quieter releases, with 775 total commits and 47 branches pulled into this one. There are 5 new SoC types plus some minor variations, and a total of 60 new machines, so I'm limiting the summary to the main noteworthy items: - Apple M1 gain support for PCI and pinctrl, getting a bit closer to a usable system out of the box. - Qualcomm gains support for Snapdragon 690 (aka SM6350) as well as SM7225, 11 new smartphones, and three additional Chromebooks, and improvements all over the place. - Samsung gains support for ExynosAutov9, an automotive version of their smartphone SoC, but otherwise no major changes. - Microchip adds the SAMA5D29 SoC in the SAMA5 family, and a number of improvements for the recently added SAMA7 family. The LAN966 SoC that was added in the platform code does not have dts files yet. Two board files are added for the older at91sam9g20 SoC - Aspeed supports two additional server boards using their AST2600 as BMC, and improves support for qemu models - Rockchip RK3566/RK3688 gets added, along with six new development boards using RK3328/RK3399/RK3566, and one Chromebook tablet. - Two NAS boxes are added using the ARMv4 based Gemini platform - One new board is added to the Intel Arria SoC FPGA family - Marvell adds one network switch based on Armada 381 and the new MOCHAbin 7040 development board - NXP adds support for the S32G2 automotive SoC, two imx6 based ebook readers, and three additional development boards, which is notably less than their usual additions, but they also gain improvements to their many existing boards - STmicroelectronics adds their stm32mp13 SoC family along with a reference board - Renesas adds new versions of their R-Car Gen3 SoCs and many updates for their older generations - Broadcom adds support for a number of Cisco Meraki wireless controllers, along with two new boards and other updates for BCM53xx/BCM47xx networking SoCs and the Raspberry Pi boards - Mediatek improves support for the MT81xx SoCs used in Chromebooks as well as the MT76xx networking SoCs - NVIDIA adds a number of cleanups and additional support for more hardware on the already supported machines - TI K3 adds support for three new boards along with cleanups - Toshiba adds one board for the Visconti family - Xilinx adds five new ZynqMP based machines - Amlogic support is added for the Radxa Zero and two Jethub home automation controllers, along with changes to other machines - Rob Herring continues his work on fixing dtc warnings all over the tree. - Minor updates for TI OMAP, Mstar, Allwinner/sunxi, Hisilicon, Ux500, Unisoc" * tag 'dt-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (720 commits) arm64: dts: apple: j274: Expose PCI node for the Ethernet MAC address arm64: dts: apple: t8103: Add root port interrupt routing arm64: dts: apple: t8103: Add PCIe DARTs arm64: apple: Add PCIe node arm64: apple: Add pinctrl nodes ARM: dts: arm: Update ICST clock nodes 'reg' and node names ARM: dts: arm: Update register-bit-led nodes 'reg' and node names arm64: dts: exynos: add chipid node for exynosautov9 SoC ARM: dts: qcom: fix typo in IPQ8064 thermal-sensor node Revert "arm64: dts: qcom: msm8916-asus-z00l: Add sensors" arm64: dts: qcom: ipq6018: Remove unused 'iface_clk' property from dma-controller node arm64: dts: qcom: ipq6018: Remove unused 'qcom,config-pipe-trust-reg' property arm64: dts: qcom: sm8350: Add CPU topology and idle-states arm64: dts: qcom: Drop unneeded extra device-specific includes arm64: dts: qcom: msm8916: Drop standalone smem node arm64: dts: qcom: Fix node name of rpm-msg-ram device nodes arm64: dts: qcom: msm8916-asus-z00l: Add sensors arm64: dts: qcom: msm8916-asus-z00l: Add SDCard arm64: dts: qcom: msm8916-asus-z00l: Add touchscreen arm64: dts: qcom: sdm845-oneplus: remove devinfo-size from ramoops node ...
2021-10-21ARM: dts: at91: sama7g5: add tcb nodesClaudiu Beznea1-0/+20
Add TCB nodes. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20211020094656.3343242-3-claudiu.beznea@microchip.com
2021-10-21ARM: dts: at91: sama7g5: add rtc nodeEugen Hristev1-0/+7
Add RTC node. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com> [claudiu.beznea: add sama7g5 compatible as the IP has 2 extra registers compared with sam9x60] Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20211020094656.3343242-2-claudiu.beznea@microchip.com
2021-09-15ARM: dts: at91: sama7g5: add node for the ADCEugen Hristev1-0/+16
Add node for the ADC controller in sama7g5 SoC. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20210901123013.329792-10-eugen.hristev@microchip.com
2021-09-14ARM: dts: at91: sama7g5: add chipidClaudiu Beznea1-0/+5
Add chipid node for sama7g5. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20210908094329.182477-1-claudiu.beznea@microchip.com
2021-09-14ARM: dts: at91: sama7g5: add shdwc nodeClaudiu Beznea1-0/+11
Add shutdown controller node and enable it. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20210823131915.23857-5-claudiu.beznea@microchip.com
2021-09-14ARM: dts: at91: sama7g5: add securam nodeClaudiu Beznea1-0/+11
Add securam node. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20210823131915.23857-4-claudiu.beznea@microchip.com
2021-09-14ARM: dts: at91: sama7g5: add ram controllersClaudiu Beznea1-0/+12
Add RAM and RAMC PHY controllers. These are necessary for platform specific power management code. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20210823131915.23857-3-claudiu.beznea@microchip.com
2021-07-19ARM: dts: at91: add sama7g5 SoC DT and sama7g5-ekEugen Hristev1-0/+528
Add Device Tree for sama7g5 SoC and associated board sama7g5-ek Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com> [claudiu.beznea@microchip.com: add clocks, ethernet, timers, power] Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> [codrin.ciubotariu@microchip.com: add audio] Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com> [nicolas.ferre@microchip.com: removed eeproms, reorder i2s dma chans] Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20210628120452.74408-2-eugen.hristev@microchip.com
generated by cgit v1.2.3 (git 2.39.1) at 2024-11-19 11:37:58 +0000