summaryrefslogtreecommitdiffstats
path: root/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml
AgeCommit message (Collapse)AuthorFilesLines
2022-12-21Merge tag 'mailbox-v6.2' of ↵Linus Torvalds1-0/+1
git://git.linaro.org/landing-teams/working/fujitsu/integration Pull mailbox updates from Jassi Brar: - qcom: enable sc8280xp, sm8550 and sm4250 support - ti: default to ARCH_K3 for msg manager - mediatek: - add mt8188 and mt8186 support - request irq only after got ready - zynq-ipi: fix error handling after device_register - mpfs: check sys-con status - rockchip: simplify by using device_get_match_data * tag 'mailbox-v6.2' of git://git.linaro.org/landing-teams/working/fujitsu/integration: dt-bindings: mailbox: qcom-ipcc: Add compatible for SM8550 mailbox: mtk-cmdq: Do not request irq until we are ready mailbox: zynq-ipi: fix error handling while device_register() fails mailbox: mtk-cmdq-mailbox: Use platform data directly instead of copying mailbox: arm_mhuv2: Fix return value check in mhuv2_probe() dt-bindings: mailbox: mediatek,gce-mailbox: add mt8188 compatible name dt-bindings: mailbox: add GCE header file for mt8188 mailbox: mpfs: read the system controller's status mailbox: mtk-cmdq: add MT8186 support mailbox: mtk-cmdq: add gce ddr enable support flow mailbox: mtk-cmdq: add gce software ddr enable private data mailbox: mtk-cmdq: Use GCE_CTRL_BY_SW definition instead of number mailbox: rockchip: Use device_get_match_data() to simplify the code dt-bindings: mailbox: qcom-ipcc: Add sc8280xp compatible mailbox: config: ti-msgmgr: Default set to ARCH_K3 for TI msg manager mailbox: qcom-apcs-ipc: Add SM4250 APCS IPC support dt-bindings: mailbox: qcom: Add SM4250 APCS compatible
2022-12-18dt-bindings: mailbox: qcom: Add SM4250 APCS compatibleBhupesh Sharma1-0/+1
Add compatible for the Qualcomm SM4250 APCS block. Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-12-16dt-bindings: drop redundant part of title (end, part three)Krzysztof Kozlowski1-1/+1
The Devicetree bindings document does not have to say in the title that it is a "binding", but instead just describe the hardware. Drop trailing "bindings" in various forms (also with trailing full stop): find Documentation/devicetree/bindings/ -type f -name '*.yaml' \ -not -name 'trivial-devices.yaml' \ -exec sed -i -e 's/^title: \(.*\) [bB]indings\?\.\?$/title: \1/' {} \; Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Acked-by: Matti Vaittinen <mazziesaccount@gmail.com> # ROHM Acked-by: Ulf Hansson <ulf.hansson@linaro.org> # MMC Acked-by: Stephen Boyd <sboyd@kernel.org> # clk Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> # input Acked-by: Mark Brown <broonie@kernel.org> Acked-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> # media Acked-by: Sebastian Reichel <sre@kernel.org> # power Acked-by: Viresh Kumar <viresh.kumar@linaro.org> # cpufreq Link: https://lore.kernel.org/r/20221216163815.522628-7-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring <robh@kernel.org>
2022-10-05dt-bindings: mailbox: qcom: correct clocks for IPQ6018 and IPQ8074Robert Marko1-12/+34
IPQ6018 APSS driver is registered by APCS as they share the same register space, and it uses "pll" and "xo" as inputs. Correct the allowed clocks for IPQ6018 and IPQ8074 as they share the same driver to allow "pll" and "xo" as clock-names. Signed-off-by: Robert Marko <robimarko@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-10-05dt-bindings: mailbox: qcom: set correct #clock-cellsRobert Marko1-1/+16
IPQ6018 and IPQ8074 require #clock-cells to be set to 1 as their APSS clock driver provides multiple clock outputs. So allow setting 1 as #clock-cells and check that its set to 1 for IPQ6018 and IPQ8074, check others for 0 as its currently. Signed-off-by: Robert Marko <robimarko@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-08-02dt-bindings: mailbox: qcom,apcs-kpss-global: Add syscon const for relevant ↵Bryan O'Donoghue1-21/+25
entries msm8916, msm8939, msm8953, msm8994 and qcs404 already declare or should declare syscon as they have drivers that use syscon inside of the apcs-kpss block. grep apcs arch/arm64/boot/dts/qcom/* | grep syscon Add in the additional syscon in the documentation for the above mentioned parts. Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-03-12dt-bindings: mailbox: Add compatible for the MSM8976Adam Skladowski1-0/+1
Add the mailbox compatible for the MSM8976 SoC. Signed-off-by: Adam Skladowski <a39.skl@gmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2021-10-16dt-bindings: mailbox: Update maintainer email for qcom apcs-kpssShawn Guo1-1/+1
Sivaprakash's codeaurora.org email address bounces. Before he comes back with his new email, fill Jassi's address in there. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2021-10-16dt-bindings: mailbox: qcom: Add QCM2290 APCS compatibleShawn Guo1-0/+1
Add compatible for the Qualcomm QCM2290 APCS block. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2021-08-30dt-bindings: mailbox: Add compatible for the MSM8953Vladimir Lypak1-0/+1
Add the mailbox compatible for the MSM8953 SoC. Signed-off-by: Vladimir Lypak <junak.pub@gmail.com> Signed-off-by: Sireesh Kodali <sireeshkodali@protonmail.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2021-08-30dt-bindings: mailbox: qcom: Add SM6115 APCS compatibleIskren Chernev1-0/+1
Add compatible for the Qualcomm SM4250/6115 APCS block to the Qualcomm APCS binding. Signed-off-by: Iskren Chernev <iskren.chernev@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2021-06-26dt-bindings: mailbox: qcom: Add MSM8939 APCS compatibleShawn Guo1-0/+1
Add compatible for the Qualcomm MSM8939 APCS block to the Qualcomm APCS bindings. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2021-06-26dt-bindings: mailbox: Add binding for sm6125Martin Botka1-0/+2
This patch adds the binding for sm6125 Signed-off-by: Martin Botka <martin.botka@somainline.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2021-02-14dt-bindings: mailbox: Add binding for SDX55 APCSManivannan Sadhasivam1-0/+33
Add devicetree YAML binding for SDX55 APCS GCC block. The APCS block acts as the mailbox controller and also provides a clock output and takes 3 clock sources (pll, aux, ref) as input. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2021-02-14dt-bindings: mailbox: qcom: Add SC8180X APCS compatibleBjorn Andersson1-0/+1
Add compatible for the Qualcomm SC8180x APCS block to the Qualcomm APCS binding. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2020-09-13dt-bindings: mailbox: add compatible for the IPQ6018 SoCKathiravan T1-0/+1
Add the mailbox compatible for the IPQ6018 SoC. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Kathiravan T <kathirav@codeaurora.org> Link: https://lore.kernel.org/r/1597648720-13649-2-git-send-email-kathirav@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-08-03mailbox: qcom: Add msm8994 apcs compatibleKonrad Dybcio1-0/+1
MSM8994 has an APCS block similar to 8916, but with a different clock driver due to the former one having 2 clusters. Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2020-08-03mailbox: qcom: Add sdm660 hmss compatibleKonrad Dybcio1-0/+1
The Qualcomm SDM660 platform has a APCS HMSS GLOBAL block, add the compatible for this. Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2020-06-08dt-bindings: mailbox: Add YAML schemas for QCOM APCS global blockSivaprakash Murugesan1-0/+86
Qualcomm APCS global block provides a bunch of generic properties which are required in a device tree. Add YAML schema for these properties. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Sivaprakash Murugesan <sivaprak@codeaurora.org> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>