diff options
Diffstat (limited to 'sound/soc')
| -rw-r--r-- | sound/soc/codecs/nau8822.c | 18 | ||||
| -rw-r--r-- | sound/soc/codecs/nau8822.h | 7 |
2 files changed, 25 insertions, 0 deletions
diff --git a/sound/soc/codecs/nau8822.c b/sound/soc/codecs/nau8822.c index c6152a044416..78db3bd0b3bc 100644 --- a/sound/soc/codecs/nau8822.c +++ b/sound/soc/codecs/nau8822.c @@ -828,6 +828,24 @@ static int nau8822_hw_params(struct snd_pcm_substream *substream, struct snd_soc_component *component = dai->component; struct nau8822 *nau8822 = snd_soc_component_get_drvdata(component); int val_len = 0, val_rate = 0; + unsigned int ctrl_val, bclk_fs, bclk_div; + + /* make BCLK and LRC divide configuration if the codec as master. */ + snd_soc_component_read(component, NAU8822_REG_CLOCKING, &ctrl_val); + if (ctrl_val & NAU8822_CLK_MASTER) { + /* get the bclk and fs ratio */ + bclk_fs = snd_soc_params_to_bclk(params) / params_rate(params); + if (bclk_fs <= 32) + bclk_div = NAU8822_BCLKDIV_8; + else if (bclk_fs <= 64) + bclk_div = NAU8822_BCLKDIV_4; + else if (bclk_fs <= 128) + bclk_div = NAU8822_BCLKDIV_2; + else + return -EINVAL; + snd_soc_component_update_bits(component, NAU8822_REG_CLOCKING, + NAU8822_BCLKSEL_MASK, bclk_div); + } switch (params_format(params)) { case SNDRV_PCM_FORMAT_S16_LE: diff --git a/sound/soc/codecs/nau8822.h b/sound/soc/codecs/nau8822.h index 9c552983a293..489191ff187e 100644 --- a/sound/soc/codecs/nau8822.h +++ b/sound/soc/codecs/nau8822.h @@ -107,10 +107,17 @@ /* NAU8822_REG_CLOCKING (0x6) */ #define NAU8822_CLKIOEN_MASK 0x1 +#define NAU8822_CLK_MASTER 0x1 +#define NAU8822_CLK_SLAVE 0x0 #define NAU8822_MCLKSEL_SFT 5 #define NAU8822_MCLKSEL_MASK (0x7 << 5) #define NAU8822_BCLKSEL_SFT 2 #define NAU8822_BCLKSEL_MASK (0x7 << 2) +#define NAU8822_BCLKDIV_1 (0x0 << 2) +#define NAU8822_BCLKDIV_2 (0x1 << 2) +#define NAU8822_BCLKDIV_4 (0x2 << 2) +#define NAU8822_BCLKDIV_8 (0x3 << 2) +#define NAU8822_BCLKDIV_16 (0x4 << 2) #define NAU8822_CLKM_MASK (0x1 << 8) #define NAU8822_CLKM_MCLK (0x0 << 8) #define NAU8822_CLKM_PLL (0x1 << 8) |