diff options
Diffstat (limited to 'drivers/misc/habanalabs/include/gaudi/asic_reg/sif_rtr_ctrl_6_regs.h')
| -rw-r--r-- | drivers/misc/habanalabs/include/gaudi/asic_reg/sif_rtr_ctrl_6_regs.h | 896 |
1 files changed, 896 insertions, 0 deletions
diff --git a/drivers/misc/habanalabs/include/gaudi/asic_reg/sif_rtr_ctrl_6_regs.h b/drivers/misc/habanalabs/include/gaudi/asic_reg/sif_rtr_ctrl_6_regs.h new file mode 100644 index 000000000000..a9ea89aa6405 --- /dev/null +++ b/drivers/misc/habanalabs/include/gaudi/asic_reg/sif_rtr_ctrl_6_regs.h @@ -0,0 +1,896 @@ +/* SPDX-License-Identifier: GPL-2.0 + * + * Copyright 2016-2018 HabanaLabs, Ltd. + * All Rights Reserved. + * + */ + +/************************************ + ** This is an auto-generated file ** + ** DO NOT EDIT BELOW ** + ************************************/ + +#ifndef ASIC_REG_SIF_RTR_CTRL_6_REGS_H_ +#define ASIC_REG_SIF_RTR_CTRL_6_REGS_H_ + +/* + ***************************************** + * SIF_RTR_CTRL_6 (Prototype: RTR_CTRL) + ***************************************** + */ + +#define mmSIF_RTR_CTRL_6_PERM_SEL 0x366108 + +#define mmSIF_RTR_CTRL_6_HBM_POLY_H3_0 0x366114 + +#define mmSIF_RTR_CTRL_6_HBM_POLY_H3_1 0x366118 + +#define mmSIF_RTR_CTRL_6_HBM_POLY_H3_2 0x36611C + +#define mmSIF_RTR_CTRL_6_HBM_POLY_H3_3 0x366120 + +#define mmSIF_RTR_CTRL_6_HBM_POLY_H3_4 0x366124 + +#define mmSIF_RTR_CTRL_6_HBM_POLY_H3_5 0x366128 + +#define mmSIF_RTR_CTRL_6_HBM_POLY_H3_6 0x36612C + +#define mmSIF_RTR_CTRL_6_HBM_POLY_H3_7 0x366130 + +#define mmSIF_RTR_CTRL_6_HBM_POLY_H3_8 0x366134 + +#define mmSIF_RTR_CTRL_6_HBM_POLY_H3_9 0x366138 + +#define mmSIF_RTR_CTRL_6_HBM_POLY_H3_10 0x36613C + +#define mmSIF_RTR_CTRL_6_HBM_POLY_H3_11 0x366140 + +#define mmSIF_RTR_CTRL_6_HBM_POLY_H3_12 0x366144 + +#define mmSIF_RTR_CTRL_6_HBM_POLY_H3_13 0x366148 + +#define mmSIF_RTR_CTRL_6_HBM_POLY_H3_14 0x36614C + +#define mmSIF_RTR_CTRL_6_HBM_POLY_H3_15 0x366150 + +#define mmSIF_RTR_CTRL_6_HBM_POLY_H3_16 0x366154 + +#define mmSIF_RTR_CTRL_6_HBM_POLY_H3_17 0x366158 + +#define mmSIF_RTR_CTRL_6_HBM_POLY_H3_18 0x36615C + +#define mmSIF_RTR_CTRL_6_HBM_POLY_H3_19 0x366160 + +#define mmSIF_RTR_CTRL_6_HBM_POLY_H3_20 0x366164 + +#define mmSIF_RTR_CTRL_6_HBM_POLY_H3_21 0x366168 + +#define mmSIF_RTR_CTRL_6_HBM_POLY_H3_22 0x36616C + +#define mmSIF_RTR_CTRL_6_HBM_POLY_H3_23 0x366170 + +#define mmSIF_RTR_CTRL_6_HBM_POLY_H3_24 0x366174 + +#define mmSIF_RTR_CTRL_6_HBM_POLY_H3_25 0x366178 + +#define mmSIF_RTR_CTRL_6_HBM_POLY_H3_26 0x36617C + +#define mmSIF_RTR_CTRL_6_HBM_POLY_H3_27 0x366180 + +#define mmSIF_RTR_CTRL_6_SRAM_POLY_H3_0 0x366184 + +#define mmSIF_RTR_CTRL_6_SRAM_POLY_H3_1 0x366188 + +#define mmSIF_RTR_CTRL_6_SRAM_POLY_H3_2 0x36618C + +#define mmSIF_RTR_CTRL_6_SRAM_POLY_H3_3 0x366190 + +#define mmSIF_RTR_CTRL_6_SRAM_POLY_H3_4 0x366194 + +#define mmSIF_RTR_CTRL_6_SRAM_POLY_H3_5 0x366198 + +#define mmSIF_RTR_CTRL_6_SRAM_POLY_H3_6 0x36619C + +#define mmSIF_RTR_CTRL_6_SRAM_POLY_H3_7 0x3661A0 + +#define mmSIF_RTR_CTRL_6_SRAM_POLY_H3_8 0x3661A4 + +#define mmSIF_RTR_CTRL_6_SRAM_POLY_H3_9 0x3661A8 + +#define mmSIF_RTR_CTRL_6_SRAM_POLY_H3_10 0x3661AC + +#define mmSIF_RTR_CTRL_6_SRAM_POLY_H3_11 0x3661B0 + +#define mmSIF_RTR_CTRL_6_SRAM_POLY_H3_12 0x3661B4 + +#define mmSIF_RTR_CTRL_6_SRAM_POLY_H3_13 0x3661B8 + +#define mmSIF_RTR_CTRL_6_SRAM_POLY_H3_14 0x3661BC + +#define mmSIF_RTR_CTRL_6_SCRAM_SRAM_EN 0x36626C + +#define mmSIF_RTR_CTRL_6_RL_HBM_EN 0x366274 + +#define mmSIF_RTR_CTRL_6_RL_HBM_SAT 0x366278 + +#define mmSIF_RTR_CTRL_6_RL_HBM_RST 0x36627C + +#define mmSIF_RTR_CTRL_6_RL_HBM_TIMEOUT 0x366280 + +#define mmSIF_RTR_CTRL_6_SCRAM_HBM_EN 0x366284 + +#define mmSIF_RTR_CTRL_6_RL_PCI_EN 0x366288 + +#define mmSIF_RTR_CTRL_6_RL_PCI_SAT 0x36628C + +#define mmSIF_RTR_CTRL_6_RL_PCI_RST 0x366290 + +#define mmSIF_RTR_CTRL_6_RL_PCI_TIMEOUT 0x366294 + +#define mmSIF_RTR_CTRL_6_RL_SRAM_EN 0x36629C + +#define mmSIF_RTR_CTRL_6_RL_SRAM_SAT 0x3662A0 + +#define mmSIF_RTR_CTRL_6_RL_SRAM_RST 0x3662A4 + +#define mmSIF_RTR_CTRL_6_RL_SRAM_TIMEOUT 0x3662AC + +#define mmSIF_RTR_CTRL_6_RL_SRAM_RED 0x3662B4 + +#define mmSIF_RTR_CTRL_6_E2E_HBM_EN 0x3662EC + +#define mmSIF_RTR_CTRL_6_E2E_PCI_EN 0x3662F0 + +#define mmSIF_RTR_CTRL_6_E2E_HBM_WR_SIZE 0x3662F4 + +#define mmSIF_RTR_CTRL_6_E2E_PCI_WR_SIZE 0x3662F8 + +#define mmSIF_RTR_CTRL_6_E2E_AW_PCI_CTR_SET_EN 0x366404 + +#define mmSIF_RTR_CTRL_6_E2E_AW_PCI_CTR_SET 0x366408 + +#define mmSIF_RTR_CTRL_6_E2E_AW_PCI_CTR_WRAP 0x36640C + +#define mmSIF_RTR_CTRL_6_E2E_AW_PCI_CTR_CNT 0x366410 + +#define mmSIF_RTR_CTRL_6_E2E_AW_HBM_CTR_SET_EN 0x366414 + +#define mmSIF_RTR_CTRL_6_E2E_AW_HBM_CTR_SET 0x366418 + +#define mmSIF_RTR_CTRL_6_E2E_HBM_RD_SIZE 0x36641C + +#define mmSIF_RTR_CTRL_6_E2E_PCI_RD_SIZE 0x366420 + +#define mmSIF_RTR_CTRL_6_E2E_AR_PCI_CTR_SET_EN 0x366424 + +#define mmSIF_RTR_CTRL_6_E2E_AR_PCI_CTR_SET 0x366428 + +#define mmSIF_RTR_CTRL_6_E2E_AR_PCI_CTR_WRAP 0x36642C + +#define mmSIF_RTR_CTRL_6_E2E_AR_PCI_CTR_CNT 0x366430 + +#define mmSIF_RTR_CTRL_6_E2E_AR_HBM_CTR_SET_EN 0x366434 + +#define mmSIF_RTR_CTRL_6_E2E_AR_HBM_CTR_SET 0x366438 + +#define mmSIF_RTR_CTRL_6_NL_HBM_SEL_0 0x366450 + +#define mmSIF_RTR_CTRL_6_NL_HBM_SEL_1 0x366454 + +#define mmSIF_RTR_CTRL_6_NON_LIN_EN 0x366480 + +#define mmSIF_RTR_CTRL_6_NL_SRAM_BANK_0 0x366500 + +#define mmSIF_RTR_CTRL_6_NL_SRAM_BANK_1 0x366504 + +#define mmSIF_RTR_CTRL_6_NL_SRAM_BANK_2 0x366508 + +#define mmSIF_RTR_CTRL_6_NL_SRAM_BANK_3 0x36650C + +#define mmSIF_RTR_CTRL_6_NL_SRAM_BANK_4 0x366510 + +#define mmSIF_RTR_CTRL_6_NL_SRAM_OFFSET_0 0x366514 + +#define mmSIF_RTR_CTRL_6_NL_SRAM_OFFSET_1 0x366520 + +#define mmSIF_RTR_CTRL_6_NL_SRAM_OFFSET_2 0x366524 + +#define mmSIF_RTR_CTRL_6_NL_SRAM_OFFSET_3 0x366528 + +#define mmSIF_RTR_CTRL_6_NL_SRAM_OFFSET_4 0x36652C + +#define mmSIF_RTR_CTRL_6_NL_SRAM_OFFSET_5 0x366530 + +#define mmSIF_RTR_CTRL_6_NL_SRAM_OFFSET_6 0x366534 + +#define mmSIF_RTR_CTRL_6_NL_SRAM_OFFSET_7 0x366538 + +#define mmSIF_RTR_CTRL_6_NL_SRAM_OFFSET_8 0x36653C + +#define mmSIF_RTR_CTRL_6_NL_SRAM_OFFSET_9 0x366540 + +#define mmSIF_RTR_CTRL_6_NL_HBM_OFFSET_0 0x366550 + +#define mmSIF_RTR_CTRL_6_NL_HBM_OFFSET_1 0x366554 + +#define mmSIF_RTR_CTRL_6_NL_HBM_OFFSET_2 0x366558 + +#define mmSIF_RTR_CTRL_6_NL_HBM_OFFSET_3 0x36655C + +#define mmSIF_RTR_CTRL_6_NL_HBM_OFFSET_4 0x366560 + +#define mmSIF_RTR_CTRL_6_NL_HBM_OFFSET_5 0x366564 + +#define mmSIF_RTR_CTRL_6_NL_HBM_OFFSET_6 0x366568 + +#define mmSIF_RTR_CTRL_6_NL_HBM_OFFSET_7 0x36656C + +#define mmSIF_RTR_CTRL_6_NL_HBM_OFFSET_8 0x366570 + +#define mmSIF_RTR_CTRL_6_NL_HBM_OFFSET_9 0x366574 + +#define mmSIF_RTR_CTRL_6_NL_HBM_OFFSET_10 0x366578 + +#define mmSIF_RTR_CTRL_6_NL_HBM_OFFSET_11 0x36657C + +#define mmSIF_RTR_CTRL_6_NL_HBM_OFFSET_12 0x366580 + +#define mmSIF_RTR_CTRL_6_NL_HBM_OFFSET_13 0x366584 + +#define mmSIF_RTR_CTRL_6_NL_HBM_OFFSET_14 0x366588 + +#define mmSIF_RTR_CTRL_6_NL_HBM_OFFSET_15 0x36658C + +#define mmSIF_RTR_CTRL_6_NL_HBM_OFFSET_16 0x366590 + +#define mmSIF_RTR_CTRL_6_NL_HBM_OFFSET_17 0x366594 + +#define mmSIF_RTR_CTRL_6_NL_HBM_OFFSET_18 0x366598 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_BASE_LOW_AW_0 0x3665E4 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_BASE_LOW_AW_1 0x3665E8 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_BASE_LOW_AW_2 0x3665EC + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_BASE_LOW_AW_3 0x3665F0 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_BASE_LOW_AW_4 0x3665F4 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_BASE_LOW_AW_5 0x3665F8 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_BASE_LOW_AW_6 0x3665FC + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_BASE_LOW_AW_7 0x366600 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_BASE_LOW_AW_8 0x366604 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_BASE_LOW_AW_9 0x366608 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_BASE_LOW_AW_10 0x36660C + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_BASE_LOW_AW_11 0x366610 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_BASE_LOW_AW_12 0x366614 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_BASE_LOW_AW_13 0x366618 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_BASE_LOW_AW_14 0x36661C + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_BASE_LOW_AW_15 0x366620 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_BASE_HIGH_AW_0 0x366624 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_BASE_HIGH_AW_1 0x366628 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_BASE_HIGH_AW_2 0x36662C + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_BASE_HIGH_AW_3 0x366630 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_BASE_HIGH_AW_4 0x366634 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_BASE_HIGH_AW_5 0x366638 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_BASE_HIGH_AW_6 0x36663C + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_BASE_HIGH_AW_7 0x366640 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_BASE_HIGH_AW_8 0x366644 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_BASE_HIGH_AW_9 0x366648 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_BASE_HIGH_AW_10 0x36664C + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_BASE_HIGH_AW_11 0x366650 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_BASE_HIGH_AW_12 0x366654 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_BASE_HIGH_AW_13 0x366658 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_BASE_HIGH_AW_14 0x36665C + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_BASE_HIGH_AW_15 0x366660 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_MASK_LOW_AW_0 0x366664 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_MASK_LOW_AW_1 0x366668 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_MASK_LOW_AW_2 0x36666C + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_MASK_LOW_AW_3 0x366670 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_MASK_LOW_AW_4 0x366674 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_MASK_LOW_AW_5 0x366678 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_MASK_LOW_AW_6 0x36667C + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_MASK_LOW_AW_7 0x366680 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_MASK_LOW_AW_8 0x366684 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_MASK_LOW_AW_9 0x366688 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_MASK_LOW_AW_10 0x36668C + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_MASK_LOW_AW_11 0x366690 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_MASK_LOW_AW_12 0x366694 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_MASK_LOW_AW_13 0x366698 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_MASK_LOW_AW_14 0x36669C + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_MASK_LOW_AW_15 0x3666A0 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_MASK_HIGH_AW_0 0x3666A4 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_MASK_HIGH_AW_1 0x3666A8 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_MASK_HIGH_AW_2 0x3666AC + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_MASK_HIGH_AW_3 0x3666B0 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_MASK_HIGH_AW_4 0x3666B4 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_MASK_HIGH_AW_5 0x3666B8 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_MASK_HIGH_AW_6 0x3666BC + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_MASK_HIGH_AW_7 0x3666C0 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_MASK_HIGH_AW_8 0x3666C4 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_MASK_HIGH_AW_9 0x3666C8 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_MASK_HIGH_AW_10 0x3666CC + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_MASK_HIGH_AW_11 0x3666D0 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_MASK_HIGH_AW_12 0x3666D4 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_MASK_HIGH_AW_13 0x3666D8 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_MASK_HIGH_AW_14 0x3666DC + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_MASK_HIGH_AW_15 0x3666E0 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_BASE_LOW_AW_0 0x3666E4 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_BASE_LOW_AW_1 0x3666E8 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_BASE_LOW_AW_2 0x3666EC + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_BASE_LOW_AW_3 0x3666F0 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_BASE_LOW_AW_4 0x3666F4 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_BASE_LOW_AW_5 0x3666F8 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_BASE_LOW_AW_6 0x3666FC + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_BASE_LOW_AW_7 0x366700 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_BASE_LOW_AW_8 0x366704 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_BASE_LOW_AW_9 0x366708 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_BASE_LOW_AW_10 0x36670C + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_BASE_LOW_AW_11 0x366710 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_BASE_LOW_AW_12 0x366714 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_BASE_LOW_AW_13 0x366718 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_BASE_LOW_AW_14 0x36671C + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_BASE_LOW_AW_15 0x366720 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_BASE_HIGH_AW_0 0x366724 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_BASE_HIGH_AW_1 0x366728 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_BASE_HIGH_AW_2 0x36672C + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_BASE_HIGH_AW_3 0x366730 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_BASE_HIGH_AW_4 0x366734 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_BASE_HIGH_AW_5 0x366738 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_BASE_HIGH_AW_6 0x36673C + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_BASE_HIGH_AW_7 0x366740 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_BASE_HIGH_AW_8 0x366744 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_BASE_HIGH_AW_9 0x366748 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_BASE_HIGH_AW_10 0x36674C + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_BASE_HIGH_AW_11 0x366750 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_BASE_HIGH_AW_12 0x366754 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_BASE_HIGH_AW_13 0x366758 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_BASE_HIGH_AW_14 0x36675C + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_BASE_HIGH_AW_15 0x366760 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_MASK_LOW_AW_0 0x366764 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_MASK_LOW_AW_1 0x366768 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_MASK_LOW_AW_2 0x36676C + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_MASK_LOW_AW_3 0x366770 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_MASK_LOW_AW_4 0x366774 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_MASK_LOW_AW_5 0x366778 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_MASK_LOW_AW_6 0x36677C + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_MASK_LOW_AW_7 0x366780 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_MASK_LOW_AW_8 0x366784 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_MASK_LOW_AW_9 0x366788 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_MASK_LOW_AW_10 0x36678C + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_MASK_LOW_AW_11 0x366790 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_MASK_LOW_AW_12 0x366794 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_MASK_LOW_AW_13 0x366798 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_MASK_LOW_AW_14 0x36679C + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_MASK_LOW_AW_15 0x3667A0 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_MASK_HIGH_AW_0 0x3667A4 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_MASK_HIGH_AW_1 0x3667A8 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_MASK_HIGH_AW_2 0x3667AC + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_MASK_HIGH_AW_3 0x3667B0 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_MASK_HIGH_AW_4 0x3667B4 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_MASK_HIGH_AW_5 0x3667B8 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_MASK_HIGH_AW_6 0x3667BC + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_MASK_HIGH_AW_7 0x3667C0 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_MASK_HIGH_AW_8 0x3667C4 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_MASK_HIGH_AW_9 0x3667C8 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_MASK_HIGH_AW_10 0x3667CC + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_MASK_HIGH_AW_11 0x3667D0 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_MASK_HIGH_AW_12 0x3667D4 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_MASK_HIGH_AW_13 0x3667D8 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_MASK_HIGH_AW_14 0x3667DC + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_MASK_HIGH_AW_15 0x3667E0 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_BASE_LOW_AR_0 0x366824 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_BASE_LOW_AR_1 0x366828 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_BASE_LOW_AR_2 0x36682C + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_BASE_LOW_AR_3 0x366830 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_BASE_LOW_AR_4 0x366834 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_BASE_LOW_AR_5 0x366838 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_BASE_LOW_AR_6 0x36683C + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_BASE_LOW_AR_7 0x366840 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_BASE_LOW_AR_8 0x366844 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_BASE_LOW_AR_9 0x366848 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_BASE_LOW_AR_10 0x36684C + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_BASE_LOW_AR_11 0x366850 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_BASE_LOW_AR_12 0x366854 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_BASE_LOW_AR_13 0x366858 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_BASE_LOW_AR_14 0x36685C + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_BASE_LOW_AR_15 0x366860 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_BASE_HIGH_AR_0 0x366864 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_BASE_HIGH_AR_1 0x366868 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_BASE_HIGH_AR_2 0x36686C + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_BASE_HIGH_AR_3 0x366870 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_BASE_HIGH_AR_4 0x366874 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_BASE_HIGH_AR_5 0x366878 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_BASE_HIGH_AR_6 0x36687C + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_BASE_HIGH_AR_7 0x366880 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_BASE_HIGH_AR_8 0x366884 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_BASE_HIGH_AR_9 0x366888 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_BASE_HIGH_AR_10 0x36688C + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_BASE_HIGH_AR_11 0x366890 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_BASE_HIGH_AR_12 0x366894 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_BASE_HIGH_AR_13 0x366898 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_BASE_HIGH_AR_14 0x36689C + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_BASE_HIGH_AR_15 0x3668A0 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_MASK_LOW_AR_0 0x3668A4 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_MASK_LOW_AR_1 0x3668A8 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_MASK_LOW_AR_2 0x3668AC + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_MASK_LOW_AR_3 0x3668B0 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_MASK_LOW_AR_4 0x3668B4 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_MASK_LOW_AR_5 0x3668B8 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_MASK_LOW_AR_6 0x3668BC + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_MASK_LOW_AR_7 0x3668C0 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_MASK_LOW_AR_8 0x3668C4 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_MASK_LOW_AR_9 0x3668C8 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_MASK_LOW_AR_10 0x3668CC + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_MASK_LOW_AR_11 0x3668D0 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_MASK_LOW_AR_12 0x3668D4 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_MASK_LOW_AR_13 0x3668D8 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_MASK_LOW_AR_14 0x3668DC + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_MASK_LOW_AR_15 0x3668E0 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_MASK_HIGH_AR_0 0x3668E4 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_MASK_HIGH_AR_1 0x3668E8 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_MASK_HIGH_AR_2 0x3668EC + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_MASK_HIGH_AR_3 0x3668F0 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_MASK_HIGH_AR_4 0x3668F4 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_MASK_HIGH_AR_5 0x3668F8 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_MASK_HIGH_AR_6 0x3668FC + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_MASK_HIGH_AR_7 0x366900 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_MASK_HIGH_AR_8 0x366904 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_MASK_HIGH_AR_9 0x366908 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_MASK_HIGH_AR_10 0x36690C + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_MASK_HIGH_AR_11 0x366910 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_MASK_HIGH_AR_12 0x366914 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_MASK_HIGH_AR_13 0x366918 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_MASK_HIGH_AR_14 0x36691C + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_MASK_HIGH_AR_15 0x366920 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_BASE_LOW_AR_0 0x366924 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_BASE_LOW_AR_1 0x366928 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_BASE_LOW_AR_2 0x36692C + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_BASE_LOW_AR_3 0x366930 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_BASE_LOW_AR_4 0x366934 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_BASE_LOW_AR_5 0x366938 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_BASE_LOW_AR_6 0x36693C + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_BASE_LOW_AR_7 0x366940 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_BASE_LOW_AR_8 0x366944 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_BASE_LOW_AR_9 0x366948 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_BASE_LOW_AR_10 0x36694C + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_BASE_LOW_AR_11 0x366950 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_BASE_LOW_AR_12 0x366954 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_BASE_LOW_AR_13 0x366958 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_BASE_LOW_AR_14 0x36695C + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_BASE_LOW_AR_15 0x366960 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_BASE_HIGH_AR_0 0x366964 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_BASE_HIGH_AR_1 0x366968 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_BASE_HIGH_AR_2 0x36696C + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_BASE_HIGH_AR_3 0x366970 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_BASE_HIGH_AR_4 0x366974 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_BASE_HIGH_AR_5 0x366978 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_BASE_HIGH_AR_6 0x36697C + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_BASE_HIGH_AR_7 0x366980 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_BASE_HIGH_AR_8 0x366984 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_BASE_HIGH_AR_9 0x366988 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_BASE_HIGH_AR_10 0x36698C + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_BASE_HIGH_AR_11 0x366990 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_BASE_HIGH_AR_12 0x366994 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_BASE_HIGH_AR_13 0x366998 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_BASE_HIGH_AR_14 0x36699C + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_BASE_HIGH_AR_15 0x3669A0 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_MASK_LOW_AR_0 0x3669A4 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_MASK_LOW_AR_1 0x3669A8 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_MASK_LOW_AR_2 0x3669AC + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_MASK_LOW_AR_3 0x3669B0 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_MASK_LOW_AR_4 0x3669B4 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_MASK_LOW_AR_5 0x3669B8 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_MASK_LOW_AR_6 0x3669BC + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_MASK_LOW_AR_7 0x3669C0 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_MASK_LOW_AR_8 0x3669C4 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_MASK_LOW_AR_9 0x3669C8 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_MASK_LOW_AR_10 0x3669CC + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_MASK_LOW_AR_11 0x3669D0 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_MASK_LOW_AR_12 0x3669D4 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_MASK_LOW_AR_13 0x3669D8 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_MASK_LOW_AR_14 0x3669DC + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_MASK_LOW_AR_15 0x3669E0 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_MASK_HIGH_AR_0 0x3669E4 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_MASK_HIGH_AR_1 0x3669E8 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_MASK_HIGH_AR_2 0x3669EC + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_MASK_HIGH_AR_3 0x3669F0 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_MASK_HIGH_AR_4 0x3669F4 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_MASK_HIGH_AR_5 0x3669F8 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_MASK_HIGH_AR_6 0x3669FC + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_MASK_HIGH_AR_7 0x366A00 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_MASK_HIGH_AR_8 0x366A04 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_MASK_HIGH_AR_9 0x366A08 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_MASK_HIGH_AR_10 0x366A0C + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_MASK_HIGH_AR_11 0x366A10 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_MASK_HIGH_AR_12 0x366A14 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_MASK_HIGH_AR_13 0x366A18 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_MASK_HIGH_AR_14 0x366A1C + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_MASK_HIGH_AR_15 0x366A20 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_HIT_AW 0x366A64 + +#define mmSIF_RTR_CTRL_6_RANGE_SEC_HIT_AR 0x366A68 + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_HIT_AW 0x366A6C + +#define mmSIF_RTR_CTRL_6_RANGE_PRIV_HIT_AR 0x366A70 + +#define mmSIF_RTR_CTRL_6_RGL_CFG 0x366B64 + +#define mmSIF_RTR_CTRL_6_RGL_SHIFT 0x366B68 + +#define mmSIF_RTR_CTRL_6_RGL_EXPECTED_LAT_0 0x366B6C + +#define mmSIF_RTR_CTRL_6_RGL_EXPECTED_LAT_1 0x366B70 + +#define mmSIF_RTR_CTRL_6_RGL_EXPECTED_LAT_2 0x366B74 + +#define mmSIF_RTR_CTRL_6_RGL_EXPECTED_LAT_3 0x366B78 + +#define mmSIF_RTR_CTRL_6_RGL_EXPECTED_LAT_4 0x366B7C + +#define mmSIF_RTR_CTRL_6_RGL_EXPECTED_LAT_5 0x366B80 + +#define mmSIF_RTR_CTRL_6_RGL_EXPECTED_LAT_6 0x366B84 + +#define mmSIF_RTR_CTRL_6_RGL_EXPECTED_LAT_7 0x366B88 + +#define mmSIF_RTR_CTRL_6_RGL_TOKEN_0 0x366BAC + +#define mmSIF_RTR_CTRL_6_RGL_TOKEN_1 0x366BB0 + +#define mmSIF_RTR_CTRL_6_RGL_TOKEN_2 0x366BB4 + +#define mmSIF_RTR_CTRL_6_RGL_TOKEN_3 0x366BB8 + +#define mmSIF_RTR_CTRL_6_RGL_TOKEN_4 0x366BBC + +#define mmSIF_RTR_CTRL_6_RGL_TOKEN_5 0x366BC0 + +#define mmSIF_RTR_CTRL_6_RGL_TOKEN_6 0x366BC4 + +#define mmSIF_RTR_CTRL_6_RGL_TOKEN_7 0x366BC8 + +#define mmSIF_RTR_CTRL_6_RGL_BANK_ID_0 0x366BEC + +#define mmSIF_RTR_CTRL_6_RGL_BANK_ID_1 0x366BF0 + +#define mmSIF_RTR_CTRL_6_RGL_BANK_ID_2 0x366BF4 + +#define mmSIF_RTR_CTRL_6_RGL_BANK_ID_3 0x366BF8 + +#define mmSIF_RTR_CTRL_6_RGL_BANK_ID_4 0x366BFC + +#define mmSIF_RTR_CTRL_6_RGL_BANK_ID_5 0x366C00 + +#define mmSIF_RTR_CTRL_6_RGL_BANK_ID_6 0x366C04 + +#define mmSIF_RTR_CTRL_6_RGL_BANK_ID_7 0x366C08 + +#define mmSIF_RTR_CTRL_6_RGL_WDT 0x366C2C + +#define mmSIF_RTR_CTRL_6_E2E_AR_HBM0_CH0_CTR_WRAP 0x366C30 + +#define mmSIF_RTR_CTRL_6_E2E_AR_HBM0_CH1_CTR_WRAP 0x366C34 + +#define mmSIF_RTR_CTRL_6_E2E_AR_HBM1_CH0_CTR_WRAP 0x366C38 + +#define mmSIF_RTR_CTRL_6_E2E_AR_HBM1_CH1_CTR_WRAP 0x366C3C + +#define mmSIF_RTR_CTRL_6_E2E_AR_HBM2_CH0_CTR_WRAP 0x366C40 + +#define mmSIF_RTR_CTRL_6_E2E_AR_HBM2_CH1_CTR_WRAP 0x366C44 + +#define mmSIF_RTR_CTRL_6_E2E_AR_HBM3_CH0_CTR_WRAP 0x366C48 + +#define mmSIF_RTR_CTRL_6_E2E_AR_HBM3_CH1_CTR_WRAP 0x366C4C + +#define mmSIF_RTR_CTRL_6_E2E_AR_HBM0_CH0_CTR_CNT 0x366C50 + +#define mmSIF_RTR_CTRL_6_E2E_AR_HBM0_CH1_CTR_CNT 0x366C54 + +#define mmSIF_RTR_CTRL_6_E2E_AR_HBM1_CH0_CTR_CNT 0x366C58 + +#define mmSIF_RTR_CTRL_6_E2E_AR_HBM1_CH1_CTR_CNT 0x366C5C + +#define mmSIF_RTR_CTRL_6_E2E_AR_HBM2_CH0_CTR_CNT 0x366C60 + +#define mmSIF_RTR_CTRL_6_E2E_AR_HBM2_CH1_CTR_CNT 0x366C64 + +#define mmSIF_RTR_CTRL_6_E2E_AR_HBM3_CH0_CTR_CNT 0x366C68 + +#define mmSIF_RTR_CTRL_6_E2E_AR_HBM3_CH1_CTR_CNT 0x366C6C + +#define mmSIF_RTR_CTRL_6_E2E_AW_HBM0_CH0_CTR_WRAP 0x366C70 + +#define mmSIF_RTR_CTRL_6_E2E_AW_HBM0_CH1_CTR_WRAP 0x366C74 + +#define mmSIF_RTR_CTRL_6_E2E_AW_HBM1_CH0_CTR_WRAP 0x366C78 + +#define mmSIF_RTR_CTRL_6_E2E_AW_HBM1_CH1_CTR_WRAP 0x366C7C + +#define mmSIF_RTR_CTRL_6_E2E_AW_HBM2_CH0_CTR_WRAP 0x366C80 + +#define mmSIF_RTR_CTRL_6_E2E_AW_HBM2_CH1_CTR_WRAP 0x366C84 + +#define mmSIF_RTR_CTRL_6_E2E_AW_HBM3_CH0_CTR_WRAP 0x366C88 + +#define mmSIF_RTR_CTRL_6_E2E_AW_HBM3_CH1_CTR_WRAP 0x366C8C + +#define mmSIF_RTR_CTRL_6_E2E_AW_HBM0_CH0_CTR_CNT 0x366C90 + +#define mmSIF_RTR_CTRL_6_E2E_AW_HBM0_CH1_CTR_CNT 0x366C94 + +#define mmSIF_RTR_CTRL_6_E2E_AW_HBM1_CH0_CTR_CNT 0x366C98 + +#define mmSIF_RTR_CTRL_6_E2E_AW_HBM1_CH1_CTR_CNT 0x366C9C + +#define mmSIF_RTR_CTRL_6_E2E_AW_HBM2_CH0_CTR_CNT 0x366CA0 + +#define mmSIF_RTR_CTRL_6_E2E_AW_HBM2_CH1_CTR_CNT 0x366CA4 + +#define mmSIF_RTR_CTRL_6_E2E_AW_HBM3_CH0_CTR_CNT 0x366CA8 + +#define mmSIF_RTR_CTRL_6_E2E_AW_HBM3_CH1_CTR_CNT 0x366CAC + +#define mmSIF_RTR_CTRL_6_NL_HBM_PC_SEL_0 0x366CB0 + +#define mmSIF_RTR_CTRL_6_NL_HBM_PC_SEL_1 0x366CB4 + +#define mmSIF_RTR_CTRL_6_NL_HBM_PC_SEL_2 0x366CB8 + +#define mmSIF_RTR_CTRL_6_NL_HBM_PC_SEL_3 0x366CBC + +#endif /* ASIC_REG_SIF_RTR_CTRL_6_REGS_H_ */ |