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Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/inc/reg_helper.h')
-rw-r--r--drivers/gpu/drm/amd/display/dc/inc/reg_helper.h34
1 files changed, 34 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/inc/reg_helper.h b/drivers/gpu/drm/amd/display/dc/inc/reg_helper.h
index 2470405e996b..a402df225a76 100644
--- a/drivers/gpu/drm/amd/display/dc/inc/reg_helper.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/reg_helper.h
@@ -498,6 +498,40 @@ uint32_t generic_indirect_reg_update_ex(const struct dc_context *ctx,
uint8_t shift1, uint32_t mask1, uint32_t field_value1,
...);
+/* indirect register access
+ * underlying implementation determines which index/data pair to be used
+ * in a synchronous way
+ */
+#define IX_REG_SET_N_SYNC(index, n, initial_val, ...) \
+ generic_indirect_reg_update_ex_sync(CTX, \
+ IND_REG(index), \
+ initial_val, \
+ n, __VA_ARGS__)
+
+#define IX_REG_SET_2_SYNC(index, init_value, f1, v1, f2, v2) \
+ IX_REG_SET_N_SYNC(index, 2, init_value, \
+ FN(reg, f1), v1,\
+ FN(reg, f2), v2)
+
+#define IX_REG_GET_N_SYNC(index, n, ...) \
+ generic_indirect_reg_get_sync(CTX, \
+ IND_REG(index), \
+ n, __VA_ARGS__)
+
+#define IX_REG_GET_SYNC(index, field, val) \
+ IX_REG_GET_N_SYNC(index, 1, \
+ FN(data_reg_name, field), val)
+
+uint32_t generic_indirect_reg_get_sync(const struct dc_context *ctx,
+ uint32_t index, int n,
+ uint8_t shift1, uint32_t mask1, uint32_t *field_value1,
+ ...);
+
+uint32_t generic_indirect_reg_update_ex_sync(const struct dc_context *ctx,
+ uint32_t index, uint32_t reg_val, int n,
+ uint8_t shift1, uint32_t mask1, uint32_t field_value1,
+ ...);
+
/* register offload macros
*
* instead of MMIO to register directly, in some cases we want