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-rw-r--r--drivers/crypto/qat/qat_common/adf_sriov.c15
1 files changed, 10 insertions, 5 deletions
diff --git a/drivers/crypto/qat/qat_common/adf_sriov.c b/drivers/crypto/qat/qat_common/adf_sriov.c
index 9a0f6db83106..d887640355d4 100644
--- a/drivers/crypto/qat/qat_common/adf_sriov.c
+++ b/drivers/crypto/qat/qat_common/adf_sriov.c
@@ -62,10 +62,12 @@ static int adf_enable_sriov(struct adf_accel_dev *accel_dev)
}
/* Set Valid bits in AE Thread to PCIe Function Mapping */
- hw_data->configure_iov_threads(accel_dev, true);
+ if (hw_data->configure_iov_threads)
+ hw_data->configure_iov_threads(accel_dev, true);
/* Enable VF to PF interrupts for all VFs */
- adf_enable_vf2pf_interrupts(accel_dev, BIT_ULL(totalvfs) - 1);
+ if (hw_data->get_pf2vf_offset)
+ adf_enable_vf2pf_interrupts(accel_dev, BIT_ULL(totalvfs) - 1);
/*
* Due to the hardware design, when SR-IOV and the ring arbiter
@@ -94,15 +96,18 @@ void adf_disable_sriov(struct adf_accel_dev *accel_dev)
if (!accel_dev->pf.vf_info)
return;
- adf_pf2vf_notify_restarting(accel_dev);
+ if (hw_data->get_pf2vf_offset)
+ adf_pf2vf_notify_restarting(accel_dev);
pci_disable_sriov(accel_to_pci_dev(accel_dev));
/* Disable VF to PF interrupts */
- adf_disable_vf2pf_interrupts(accel_dev, GENMASK(31, 0));
+ if (hw_data->get_pf2vf_offset)
+ adf_disable_vf2pf_interrupts(accel_dev, GENMASK(31, 0));
/* Clear Valid bits in AE Thread to PCIe Function Mapping */
- hw_data->configure_iov_threads(accel_dev, false);
+ if (hw_data->configure_iov_threads)
+ hw_data->configure_iov_threads(accel_dev, false);
for (i = 0, vf = accel_dev->pf.vf_info; i < totalvfs; i++, vf++) {
tasklet_disable(&vf->vf2pf_bh_tasklet);